FreeCalypso > hg > fc-sim-sniff
graph
-
sw/sniff-dec/Makefile: no LIBSThu, 31 Aug 2023 08:47:32 +0000, by Mychaela Falconia
-
simtrace3-sniff-dec startedThu, 31 Aug 2023 08:46:23 +0000, by Mychaela Falconia
-
new README, old stuff goes to doc/MotivationWed, 30 Aug 2023 05:39:53 +0000, by Mychaela Falconia
-
doc/Cardem-plans: article writtenWed, 30 Aug 2023 03:32:06 +0000, by Mychaela Falconia
-
doc/ME-ID-terminology: document writtenWed, 30 Aug 2023 03:08:08 +0000, by Mychaela Falconia
-
doc/Sniffing-workflow: document writtenWed, 30 Aug 2023 03:03:04 +0000, by Mychaela Falconia
-
doc/Sniffing-hw-setup: document writtenWed, 30 Aug 2023 02:22:44 +0000, by Mychaela Falconia
-
doc/Sniffer-FPGA-design: update for finished workWed, 30 Aug 2023 01:09:00 +0000, by Mychaela Falconia
-
doc/PPS-catcher-FSM: it has been implementedTue, 29 Aug 2023 22:58:26 +0000, by Mychaela Falconia
-
sw/Makefile: add installTue, 29 Aug 2023 21:47:17 +0000, by Mychaela Falconia
-
sw/sniff-rx/Makefile: add installTue, 29 Aug 2023 21:44:22 +0000, by Mychaela Falconia
-
fpga/sniffer-pps: add actual F/D controlTue, 29 Aug 2023 21:22:37 +0000, by Mychaela Falconia
-
fpga/sniffer-*: forgot to change SIM_RST to SIM_RST_in for LED5Tue, 29 Aug 2023 20:36:34 +0000, by Mychaela Falconia
-
fpga: add top Makefile across projectsTue, 29 Aug 2023 20:35:51 +0000, by Mychaela Falconia
-
fpga/sniffer-pps: first versionTue, 29 Aug 2023 20:05:23 +0000, by Mychaela Falconia
-
fpga tree: move icestick.pcf to common subdirectoryTue, 29 Aug 2023 18:10:41 +0000, by Mychaela Falconia
-
fpga/sniffer-basic: drive pin 115 high for cardem podTue, 29 Aug 2023 18:05:09 +0000, by Mychaela Falconia
-
doc/Sniffer-FPGA-design: update for working statusTue, 29 Aug 2023 06:37:58 +0000, by Mychaela Falconia
-
doc/PPS-catcher-FSM: initial descriptionTue, 22 Aug 2023 08:55:33 +0000, by Mychaela Falconia
-
sw/Makefile: addTue, 22 Aug 2023 06:29:27 +0000, by Mychaela Falconia
-
sw: simtrace3-sniff-rx program written, compilesTue, 22 Aug 2023 06:16:44 +0000, by Mychaela Falconia
-
sw/libserial: based on FC host tools versionTue, 22 Aug 2023 02:44:23 +0000, by Mychaela Falconia
-
doc: on later thought, drop the DUS term in favor of ME/IDMon, 21 Aug 2023 20:14:26 +0000, by Mychaela Falconia
-
FPGA make clean: rm *.rpt tooMon, 21 Aug 2023 19:26:24 +0000, by Mychaela Falconia
-
FPGA build: include yosys-wrap in this repositoryMon, 21 Aug 2023 19:25:35 +0000, by Mychaela Falconia
-
doc/Sniffer-FPGA-design: update for first implementationMon, 21 Aug 2023 06:50:55 +0000, by Mychaela Falconia
-
.hgignore: add mv-sniffer gerber filesMon, 21 Aug 2023 03:09:34 +0000, by Mychaela Falconia
-
boards/mv-sniffer/pcb: add MakefileMon, 21 Aug 2023 03:03:41 +0000, by Mychaela Falconia
-
boards/mv-sniffer: PCB layout doneMon, 21 Aug 2023 03:02:01 +0000, by Mychaela Falconia
-
FPGA Makefile: generate timing.rptMon, 21 Aug 2023 01:12:16 +0000, by Mychaela Falconia
-
FPGA Makefile: generate pnr.rptMon, 21 Aug 2023 01:10:23 +0000, by Mychaela Falconia
-
fpga/sniffer-basic/top.v: correct SIM_RST polarity for LEDMon, 21 Aug 2023 01:07:26 +0000, by Mychaela Falconia