# HG changeset patch
# User Mychaela Falconia <falcon@freecalypso.org>
# Date 1692580336 0
# Node ID 82da4b7835b78fc874b45f7d50c9d82bc9ca0cd5
# Parent  d29dcfa781246a73b10b08c6a56a8f70e03049c8
FPGA Makefile: generate timing.rpt

diff -r d29dcfa78124 -r 82da4b7835b7 fpga/sniffer-basic/Makefile
--- a/fpga/sniffer-basic/Makefile	Mon Aug 21 01:10:23 2023 +0000
+++ b/fpga/sniffer-basic/Makefile	Mon Aug 21 01:12:16 2023 +0000
@@ -2,7 +2,7 @@
 PCF=	icestick.pcf
 PROJ=	fpga
 
-all:	${PROJ}.bin
+all:	${PROJ}.bin timing.rpt
 
 ${PROJ}.json:	${VSRC}
 	yosys-wrap top $@ ${VSRC} | tee synthesis.rpt
@@ -14,5 +14,8 @@
 ${PROJ}.bin:	${PROJ}.asc
 	icepack $< $@
 
+timing.rpt:	${PROJ}.asc
+	icetime -d hx1k -mtr $@ $<
+
 clean:
 	rm -f *.json *.asc *.bin