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19 months ago
Mychaela Falconia
boards/mv-sniffer/pcb: add Makefile
19 months ago
Mychaela Falconia
boards/mv-sniffer: PCB layout done
19 months ago
Mychaela Falconia
FPGA Makefile: generate timing.rpt
19 months ago
Mychaela Falconia
FPGA Makefile: generate pnr.rpt
19 months ago
Mychaela Falconia
fpga/sniffer-basic/top.v: correct SIM_RST polarity for LED
19 months ago
Mychaela Falconia
fpga/sniffer-basic/sniff_rx.v: typo in signal name
19 months ago
Mychaela Falconia
FPGA Makefile: capture yosys stdout
19 months ago
Mychaela Falconia
FPGA Makefile: yosys-wrap installed on Mother's system
19 months ago
Mychaela Falconia
.hgignore: add FPGA build products
19 months ago
Mychaela Falconia
fpga/sniffer-basic: initial version
20 months ago
Mychaela Falconia
doc: add ISO7816-specs pointer article
20 months ago
Mychaela Falconia
doc: describe proposed FPGA design
20 months ago
Mychaela Falconia
boards/mv-sniffer/src: generate elements.pcb
20 months ago
Mychaela Falconia
boards/mv-sniffer/src: components bound to MCL
20 months ago
Mychaela Falconia
beginning of mv-sniffer adapter board design
20 months ago
Mychaela Falconia
starting project with README and sim-fpc-pasv adapter
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