annotate duart28/src/primitives @ 33:0073141010a2

duart28/src/Makefile: netlist MCL binding added
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 05 Jul 2020 00:10:45 +0000
parents bd7eec55ebc0
children
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43097651a26d duart28/src/primitives: adapted from fc-uja
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1 /*
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2 * This file defines the primitives to be instantiated from the structural
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3 * Verilog source for the board: IC package types, basic components and
43097651a26d duart28/src/primitives: adapted from fc-uja
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4 * subpackages to be mapped later in the MCL binding step.
43097651a26d duart28/src/primitives: adapted from fc-uja
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5 */
43097651a26d duart28/src/primitives: adapted from fc-uja
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6
43097651a26d duart28/src/primitives: adapted from fc-uja
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7 resistor numpins 2;
43097651a26d duart28/src/primitives: adapted from fc-uja
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8 capacitor numpins 2;
43097651a26d duart28/src/primitives: adapted from fc-uja
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9 inductor numpins 2;
43097651a26d duart28/src/primitives: adapted from fc-uja
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43097651a26d duart28/src/primitives: adapted from fc-uja
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11 /* IC packages */
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12 pkg_LQFP48 numpins 48;
43097651a26d duart28/src/primitives: adapted from fc-uja
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13 pkg_5pin numpins 5;
43097651a26d duart28/src/primitives: adapted from fc-uja
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14 pkg_8pin numpins 8;
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15
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bd7eec55ebc0 duart28: new design ideas
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16 /* 74LVC541A single buffer and common part subpackages */
bd7eec55ebc0 duart28: new design ideas
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17 buffer_ic_slot mapped_pins (A, Y);
bd7eec55ebc0 duart28: new design ideas
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18 buffer_ic_common mapped_pins (Vcc, GND, nOE1, nOE2);
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20 /* crystal resonator */
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21 xtal_2pin_pkg numpins 2;
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22
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23 /* connectors */
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24 header_2pin numpins 2;
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25 header_3pin numpins 3;
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26 header_10pin numpins 10;
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27 conn_miniUSB_plus4 numpins 9;