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annotate lunalcd1/src/regulator.v @ 20:54e5edfe2f04

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duart28 project started
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 13 Jun 2020 05:12:39 +0000
parents 839e9b527e69
children
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1 module regulator (IN, OUT, GND, EN);
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2
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3 input IN, GND, EN;
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4 output OUT;
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6 pkg_5pin pkg ( .pin_1(IN),
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7 .pin_2(GND),
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8 .pin_3(EN),
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9 .pin_4(), /* no connect */
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10 .pin_5(OUT)
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11 );
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13 endmodule