FreeCalypso > hg > fc-small-hw

annotate lcr0402/fp-input @ 59:d5d14b426faa

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lunalcd2: structural Verilog source captured
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 25 Jun 2021 18:44:11 +0000
parents d683ee552862
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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53
d683ee552862 lcr0402 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
1 include(template.pcb)
d683ee552862 lcr0402 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
2 make_footprint(`0402',`DUT1',)
d683ee552862 lcr0402 project started
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
3 make_footprint(`JUMPER2',`J1',)