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comparison duart28/src/vsrc/USB_block.v @ 23:22aba3a61a4b

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duart28: vsrc passes sverp
author Mychaela Falconia <falcon@freecalypso.org>
date Sat, 13 Jun 2020 06:38:05 +0000
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22:43097651a26d 23:22aba3a61a4b
1 /*
2 * This module encapsulates the USB connector, the FT2232D block and
3 * the glue components between them.
4 */
5
6 module USB_block (GND, P_5V, VCCIOA, VCCIOB,
7 ADBUS, ACBUS, SI_WUA, BDBUS, BCBUS, SI_WUB, PWREN);
8
9 output GND, P_5V;
10
11 input VCCIOA, VCCIOB;
12 inout [7:0] ADBUS, BDBUS;
13 inout [3:0] ACBUS, BCBUS;
14 input SI_WUA, SI_WUB;
15 output PWREN;
16
17 /* interconnecting wires */
18
19 wire VBUS;
20 wire DM_connector_side, DM_chip_side;
21 wire DP_connector_side, DP_chip_side;
22 wire RSTOUT;
23
24 usb_conn conn (.GND(GND),
25 .VBUS(VBUS),
26 .Dminus(DM_connector_side),
27 .Dplus(DP_connector_side),
28 .ID() /* no connect */
29 );
30
31 /* ferrite bead on the power supply */
32
33 inductor VBUS_ferrite (VBUS, P_5V);
34
35 /* series resistors on USB data lines */
36
37 resistor DM_series_R (DM_connector_side, DM_chip_side);
38 resistor DP_series_R (DP_connector_side, DP_chip_side);
39
40 /* we can now bring in the FT2232D block */
41
42 FT2232D_block FT2232D (.GND(GND),
43 .VCC(P_5V),
44 .VCCIOA(VCCIOA),
45 .VCCIOB(VCCIOB),
46 .USBDP(DP_chip_side),
47 .USBDM(DM_chip_side),
48 .RESET(P_5V),
49 .RSTOUT(RSTOUT),
50 .PWREN(PWREN),
51 .ADBUS(ADBUS),
52 .ACBUS(ACBUS),
53 .SI_WUA(SI_WUA),
54 .BDBUS(BDBUS),
55 .BCBUS(BCBUS),
56 .SI_WUB(SI_WUB)
57 );
58
59 resistor DP_pullup_R (DP_chip_side, RSTOUT);
60
61 /* power bypass caps */
62
63 capacitor VBUS_in_cap (VBUS, GND);
64 capacitor P_5V_cap (P_5V, GND);
65 capacitor P_5V_cap2 (P_5V, GND);
66
67 endmodule