--- /dev/null	Thu Jan 01 00:00:00 1970 +0000
+++ b/mmtb1/schem+bom/primitives	Mon Oct 21 00:53:38 2019 +0000
@@ -0,0 +1,21 @@
+/*
+ * This file defines the primitives to be instantiated from the structural
+ * Verilog source for the board: IC package types, basic components and
+ * subpackages to be mapped later in the MCL binding step.
+ */
+
+resistor	numpins 2;
+capacitor	numpins 2;
+
+diode		mapped_pins (A, C);
+mosfet		mapped_pins (G, S, D);
+
+/* connectors */
+header_2pin		numpins 2;
+conn_3pin		numpins 3;
+header_10pin		numpins 10;
+conn_40pin_plus2	numpins 42;
+
+/* misc peripherals */
+pkg_SIM_socket		mapped_pins (C1, C2, C3, C5, C6, C7, M1, M2);
+pkg_pushbutton_4pin	numpins 4;