FreeCalypso > hg > fc-small-hw
diff sim-fpc-pasv/src/schem.v @ 82:803667312307
sim-fpc-pasv: schem+BOM design complete
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 25 Oct 2022 06:13:01 +0000 |
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--- /dev/null Thu Jan 01 00:00:00 1970 +0000 +++ b/sim-fpc-pasv/src/schem.v Tue Oct 25 06:13:01 2022 +0000 @@ -0,0 +1,40 @@ +module board (); + +wire GND, VCC, VPP, RST, CLK, IO; + +conn_6pin_plus2 fpc (.pin_1(VCC), + .pin_2(RST), + .pin_3(CLK), + .pin_4(IO), + .pin_5(VPP), + .pin_6(GND), + /* mounting pads */ + .pin_7(GND), + .pin_8(GND) + ); + +pkg_SIM_socket sim (.pin_1(VCC), + .pin_2(RST), + .pin_3(CLK), + .pin_4(), /* gap in footprint pin numbering */ + .pin_5(GND), + .pin_6(VPP), + .pin_7(IO), + .pin_8() /* gap in footprint pin numbering */ + ); + +capacitor C1 (VCC, GND); + +header_4pin tap_C1_C3 ( .pin_1(GND), + .pin_2(VCC), /* C1 */ + .pin_3(RST), /* C2 */ + .pin_4(CLK) /* C3 */ + ); + +header_4pin tap_C5_C7 ( .pin_1(GND), + .pin_2(GND), /* C5 */ + .pin_3(VPP), /* C6 */ + .pin_4(IO) /* C7 */ + ); + +endmodule