FreeCalypso > hg > fc-small-hw
view fc-uja/schem+bom/vsrc/regulator_with_caps.v @ 70:000411b39576
lunalcd2/src/Makefile: generate BOM outputs
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sat, 26 Jun 2021 21:16:48 +0000 |
parents | 0f9bdd60ce50 |
children |
line wrap: on
line source
module regulator_with_caps (GND, IN, OUT); input GND, IN; output OUT; regulator_ic reg (.IN(IN), .OUT(OUT), .GND(GND), .EN(IN) ); capacitor input_cap (IN, GND); capacitor output_cap (OUT, GND); endmodule