view duart28/src/vsrc/regulator_ic.v @ 33:0073141010a2

duart28/src/Makefile: netlist MCL binding added
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 05 Jul 2020 00:10:45 +0000
parents 22aba3a61a4b
children
line wrap: on
line source

module regulator_ic (IN, OUT, GND, EN);

input IN, GND, EN;
output OUT;

pkg_5pin pkg (  .pin_1(IN),
		.pin_2(GND),
		.pin_3(EN),
		.pin_4(),	/* no connect */
		.pin_5(OUT)
	);

endmodule