FreeCalypso > hg > fc-small-hw
view duart28/src/vsrc/application_block.v @ 23:22aba3a61a4b
duart28: vsrc passes sverp
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sat, 13 Jun 2020 06:38:05 +0000 |
parents | |
children | bd7eec55ebc0 |
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/* * This module encapsulates the application function of our board: * dual UART with 2.8V outputs. */ module application_block (GND, P_2V8, ADBUS, BDBUS); input GND, P_2V8; inout [7:0] ADBUS, BDBUS; /* 2.8V output wires */ wire TxD_2V8, RTS_2V8, DTR_2V8, TxD2_2V8; /* output buffers */ buffer_ic_common output_buf_common (.Vcc(P_2V8), .GND(GND)); capacitor output_buf_bypass_cap (P_2V8, GND); buffer_ic_slot buf_TxD (.A(ADBUS[0]), .Y(TxD_2V8), .nOE(GND)); buffer_ic_slot buf_RTS (.A(ADBUS[2]), .Y(RTS_2V8), .nOE(GND)); buffer_ic_slot buf_DTR (.A(ADBUS[4]), .Y(DTR_2V8), .nOE(GND)); buffer_ic_slot buf_TxD2 (.A(BDBUS[0]), .Y(TxD2_2V8), .nOE(GND)); /* target interface headers */ target_if target_if ( .GND(GND), .UART0_TxD(TxD_2V8), .UART0_RxD(ADBUS[1]), .UART0_RTS(RTS_2V8), .UART0_CTS(ADBUS[3]), .UART0_DTR(DTR_2V8), .UART0_DSR(ADBUS[5]), .UART0_DCD(ADBUS[6]), .UART0_RI(ADBUS[7]), .UART1_TxD(TxD2_2V8), .UART1_RxD(BDBUS[1]) ); endmodule