FreeCalypso > hg > fc-small-hw
view fc-uja/schem+bom/vsrc/target_if.v @ 82:803667312307
sim-fpc-pasv: schem+BOM design complete
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 25 Oct 2022 06:13:01 +0000 |
parents | 0f9bdd60ce50 |
children |
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/* This module captures our target interfaces. */ module target_if (GND, JTAG_TCK, JTAG_TDI, JTAG_TDO, JTAG_TMS, nTESTRESET, nEMU, UART_TxD, UART_RxD); input GND; input JTAG_TCK, JTAG_TDI, JTAG_TMS; output JTAG_TDO, nTESTRESET; inout [1:0] nEMU; input UART_TxD; output UART_RxD; /* TI JTAG header */ header_14pin ti_jtag_hdr (.pin_1(JTAG_TMS), .pin_2(nTESTRESET), .pin_3(JTAG_TDI), .pin_4(), /* no connect */ .pin_5(), /* no connect */ .pin_6(), /* no connect */ .pin_7(JTAG_TDO), .pin_8(GND), .pin_9(), /* no connect */ .pin_10(GND), .pin_11(JTAG_TCK), .pin_12(GND), .pin_13(nEMU[0]), .pin_14(nEMU[1]) ); /* 3-pin UART header */ header_3pin uart_hdr ( .pin_1(GND), .pin_2(UART_RxD), .pin_3(UART_TxD) ); /* FFC connector for FreeCalypso handset boards */ conn_12pin_plus2 ffc_conn (.pin_1(), /* no connect */ .pin_2(UART_TxD), .pin_3(nTESTRESET), .pin_4(JTAG_TDI), .pin_5(JTAG_TMS), .pin_6(JTAG_TCK), .pin_7(UART_RxD), .pin_8(JTAG_TDO), .pin_9(), /* no connect */ .pin_10(GND), .pin_11(), /* no connect */ .pin_12(), /* no connect */ /* mounting pads */ .pin_13(GND), .pin_14(GND) ); endmodule