view lunalcd2/src/Makefile @ 82:803667312307

sim-fpc-pasv: schem+BOM design complete
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 25 Oct 2022 06:13:01 +0000
parents 000411b39576
children
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VSRCS=	vsrc/MAX1916.v vsrc/bl_current_sink.v vsrc/board.v \
	vsrc/current_select.v vsrc/lcd_module.v
BOMS=	tallied-bom.txt tallied-bom.csv comptab.txt
NETS=	sverp.unet bound.unet pcb-netlist.txt

all:	${BOMS} ${NETS} elements.pcb

tallied-bom.txt:	MCL
	ueda-mkbom -cr > $@

tallied-bom.csv:	MCL
	ueda-csvbom > $@

comptab.txt:	MCL
	ueda-shortbom > $@

sverp.unet:	${VSRCS} primitives Makefile
	ueda-sverp -o $@ ${VSRCS}

bound.unet:	MCL sverp.unet
	unet-bind -c sverp.unet $@

pcb-netlist.txt:	bound.unet
	unet2pcb bound.unet $@

elements.pcb:	MCL
	ueda-getfps -ch | ueda-runm4 > $@

clean:
	rm -f *.unet *.txt *.csv errs elements.pcb