view fc-uja/schem+bom/vsrc/eeprom_93Cx6_16bit.v @ 62:907bff95244d

lunalcd2/src/Makefile: generate elements.pcb
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 25 Jun 2021 19:11:21 +0000
parents 0f9bdd60ce50
children
line wrap: on
line source

module eeprom_93Cx6_16bit (GND, VCC, CS, SK, DIN, DOUT);

input GND, VCC;
input CS, SK, DIN;
output DOUT;

/* instantiate the package; the mapping of signals to pins is defined here */

pkg_8pin pkg   (.pin_1(CS),
		.pin_2(SK),
		.pin_3(DIN),
		.pin_4(DOUT),
		.pin_5(GND),
		.pin_6(VCC),	/* ORG input on some 93Cx6 variants */
		.pin_7(),	/* no connect */
		.pin_8(VCC)
	);

endmodule