view fc-uja/schem+bom/vsrc/od_buffer.v @ 62:907bff95244d

lunalcd2/src/Makefile: generate elements.pcb
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 25 Jun 2021 19:11:21 +0000
parents 0f9bdd60ce50
children
line wrap: on
line source

module od_buffer (GND, Vcc, A, Y);

input GND, Vcc;
input A;
output Y;

/* instantiate the package; the mapping of signals to pins is defined here */

pkg_XSON6 pkg  (.pin_1(),	/* no connect */
		.pin_2(A),
		.pin_3(GND),
		.pin_4(Y),
		.pin_5(),	/* no connect */
		.pin_6(Vcc)
	);

endmodule