FreeCalypso > hg > fc-small-hw
view fc-uja/schem+bom/vsrc/regulator_with_caps.v @ 28:bd7eec55ebc0
duart28: new design ideas
* added input buffers (LVC with Ioff feature) to prevent high current flow
from powered-up target into powered-down FT2232D inputs;
* added series resistors on outputs to limit current flow from powered-up
adapter into powered-down Calypso target;
* buffer IC changed from 74LVC125A to 74LVC541A.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sun, 28 Jun 2020 22:06:24 +0000 |
parents | 0f9bdd60ce50 |
children |
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module regulator_with_caps (GND, IN, OUT); input GND, IN; output OUT; regulator_ic reg (.IN(IN), .OUT(OUT), .GND(GND), .EN(IN) ); capacitor input_cap (IN, GND); capacitor output_cap (OUT, GND); endmodule