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view lunalcd1/src/regulator.v @ 61:df8f40386c0b

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lunalcd2/src/Makefile: generate pcb-netlist.txt
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 25 Jun 2021 19:08:13 +0000
parents 839e9b527e69
children
line wrap: on
line source

module regulator (IN, OUT, GND, EN);

input IN, GND, EN;
output OUT;

pkg_5pin pkg (  .pin_1(IN),
		.pin_2(GND),
		.pin_3(EN),
		.pin_4(),	/* no connect */
		.pin_5(OUT)
	);

endmodule