--- a/duart28/design-spec	Thu Jul 23 18:14:16 2020 +0000
+++ b/duart28/design-spec	Thu Jul 23 19:49:00 2020 +0000
@@ -231,3 +231,73 @@
 than our current 1.77 mA; with our current plan of populating 2.2 kOhm resistors
 the current will be 1.27 mA, and we are hoping that 812500 baud communication
 will still work OK.
+
+2.3. UART inputs to the adapter
+
+We have a total of 6 inputs: RxD, CTS, DSR, DCD, RI and RxD2.  These inputs
+need to pass through LVC buffers just like the outputs, but for a different
+reason.  With inputs there is no need for voltage level translation, but the
+need for LVC buffers arises because of partial power-down considerations - the
+scenario when the Calypso board is fully up and running and is connected to the
+DUART adapter, but there is no USB host connected - see section 1.3.  If
+Calypso UART outputs are connected directly to FT2232D inputs without any
+intermediate buffers, this condition is handled very poorly, with about 5.8 mA
+of current flowing per pin, which is certainly not acceptable for a proper
+design.
+
+Insertion of an LVC buffer into each input signal path neatly solves this
+problem: these buffers are specifically designed for partial power-down
+applications and have very small Ioff leakage current - listed as 0.1 uA
+typical or 10 uA maximum in the 74LVC541A datasheet.
+
+One additional complication is that we also have to add explicit pull-up
+resistors (to our local 2.8V rail) on each of our 6 inputs in front of the
+buffer IC.  Many of our UART inputs may be legitimately left unconnected, and
+these unconnected inputs should be sensed by our FT2232D USB UART as high.  If
+we were connecting to FT2232D inputs directly, the FT2232D chip's internal
+pull-ups would take care of this condition, but when we have a 74LVC541A buffer
+in front of these FT2232D inputs, this buffer IC's own inputs must not be left
+floating.
+
+2.4. LVC buffer details
+
+We shall use two LVC buffer ICs of the same type (74LVC541A), one for the 4
+outputs, the other for the 6 inputs.  Each 74LVC541A is an octal buffer, thus
+some slots in each IC remain unused; all unused slots will have their A inputs
+tied to GND.  Both nOE1 and nOE2 on each buffer IC are also tied to GND,
+resulting in all buffers being always enabled.
+
+The 74LVC541A buffer for outputs will have its Vcc supply pin fed with 2.8V, as
+required in order to produce 2.8V logic levels on outputs from the adapter.
+However, the other 74LVC541A buffer for inputs will have its Vcc supply pin fed
+with 3.3V, same as FT2232D VCCIOA and VCCIOB.
+
+When the inputs coming from the connected Calypso target have 2.8V logic levels
+and ultimately need to go to FT2232D receivers operating at 3.3V, a sort of
+translation will have to happen somewhere, with a CMOS input structure operating
+with a 3.3V supply being fed 2.8V inputs.  We can make this translation happen
+in the FT2232D if we use an intermediate LVC buffer powered at 2.8V or no
+intermediate buffer at all, or we can make this translation happen in the LVC
+buffer if the latter is powered with the same 3.3V as the FT2232D I/O pins.
+The second approach has been chosen because the behaviour of 74LVC541A under
+these conditions is much better understood than the behaviour of FT2232D I/O
+cells under the same, thanks to much better documentation being available for
+74LVC541A than for that part of FT2232D.
+
+Please note, however, that the pull-up resistors on inputs before input-serving
+74LVC541A buffer will be wired to our local 2.8V rail, not to 3.3V, even though
+the buffer IC will be powered with 3.3V.  This way all interface signals exist
+strictly in the 2.8V domain and never get exposed to 3.3V in any form.
+
+2.5. LDO regulators
+
+Two LDO regulators will be implemented on our adapter board, both powered from
+USB 5V: one producing 3.3V, the other producing 2.8V.  Our 3.3V LDO will power
+FT2232D VCCIOA & VCCIOB and the input-serving 74LVC541A buffer, whereas the
+other 2.8V LDO will power our output-serving 74LVC541A buffer and our input
+pull-up resistors.  Both LDOs will be of TLV702 family from TI, based on our
+recent good experiences with this LDO family in other projects.
+
+The FT2232D chip's built-in 3.3V LDO won't be used: its 5 mA current limit
+seems to be too small, and our current FT2232D adapter boards made by PLDkit
+don't use it either, using an external beefier LDO instead.