log

age author description
Sun, 22 Mar 2020 03:19:38 +0000 Mychaela Falconia lunalcd1 board project started
Tue, 10 Dec 2019 06:56:59 +0000 Mychaela Falconia mmtb1/pcb: added Makefile for fab output generation
Tue, 10 Dec 2019 06:51:02 +0000 Mychaela Falconia mmtb1.pcb: silk text markings added
Tue, 10 Dec 2019 06:12:04 +0000 Mychaela Falconia mmtb1.pcb: DRC fixed to pass