log

age author description
2020-07-29 Mychaela Falconia duart28c: 74LVC2G07 pinout captured
2020-07-29 Mychaela Falconia duart28c MCL: new components added
2020-07-29 Mychaela Falconia duart28c: started with a copy from duart28
2020-07-28 Mychaela Falconia duart28: another U5 slot change
2020-07-28 Mychaela Falconia duart28: U5 & U6 slot change by PCB layout engineer
2020-07-24 Mychaela Falconia duart28/how-to-compile added
2020-07-24 Mychaela Falconia duart28/pcb: starting point for layout job
2020-07-24 Mychaela Falconia duart28/design-spec: layout instructions added
2020-07-24 Mychaela Falconia duart28/src/Makefile: added dependency on U[56].slotmap
2020-07-24 Mychaela Falconia duart28/src/MCL: value attribute was wrong on the tantalum cap
2020-07-23 Mychaela Falconia duart28/design-spec: circuit description should be complete
2020-07-23 Mychaela Falconia duart28/design-spec: re-measured partial power-down current
2020-07-23 Mychaela Falconia duart28/design-spec: coming along
2020-07-14 Mychaela Falconia duart28/design-spec: minor fixes in the so-far-written section
2020-07-14 Mychaela Falconia duart28/design-spec started
2020-07-05 Mychaela Falconia duart28/src/Makefile: netlist MCL binding added
2020-07-04 Mychaela Falconia duart28 MCL: resistors captured
2020-07-04 Mychaela Falconia duart28: added bypass caps on FT2232D VCCIOA & VCCIOB
2020-07-04 Mychaela Falconia duart28 MCL: capacitors captured
2020-06-29 Mychaela Falconia duart28: U5 & U6 preliminary slotmaps
2020-06-28 Mychaela Falconia duart28: new design ideas
2020-06-13 Mychaela Falconia duart28 MCL: ferrite bead defined
2020-06-13 Mychaela Falconia duart28 MCL: crystal defined
2020-06-13 Mychaela Falconia duart28 MCL: beginning of hier= mapping
2020-06-13 Mychaela Falconia duart28/src/vsrc/board.v: aux_5V added
2020-06-13 Mychaela Falconia duart28: vsrc passes sverp
2020-06-13 Mychaela Falconia duart28/src/primitives: adapted from fc-uja
2020-06-13 Mychaela Falconia duart28 MCL: added 2-pin header for misc-use 5V