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annotate components/ppp_ir @ 51:04aaa5622fa7

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disable deep sleep when Iota LEDB is on TI's Iota chip docs say that CLK13M must be running in order for LEDB to work, and practical experience on Mot C139 which uses Iota LEDB for its keypad backlight concurs: if Calypso enters deep sleep while the keypad backlight is turned on, the light flickers visibly as the chipset goes into and out of deep sleep. TI's original L1 sleep manager code had logic to disable deep sleep when LT_Status() returns nonzero, but that function only works for B-Sample and C-Sample LT, always returns 0 on BOARD 41 - no check of Iota LEDB status anywhere. Change this code for our current hardware: disable deep sleep when Iota LEDB has been turned on through LLS.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 19 Oct 2020 05:11:29 +0000
parents e58a5bb12de4
children
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1 # Building ppp_ir.lib from the TCS3.2 source
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2
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3 CFLAGS="-me -mt -o -pw2 -x -mw"
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4
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5 # Defines
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6
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7 CPPFLAGS=-DCCDTABLES_EXTERN
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8 CPPFLAGS="$CPPFLAGS -DOPTION_MULTITHREAD"
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9 CPPFLAGS="$CPPFLAGS -DNEW_FRAME"
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10 CPPFLAGS="$CPPFLAGS -DNEW_ENTITY"
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11 CPPFLAGS="$CPPFLAGS -D_TARGET_"
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12 CPPFLAGS="$CPPFLAGS -DSHARED_VSI"
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13 CPPFLAGS="$CPPFLAGS -DALR"
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14 CPPFLAGS="$CPPFLAGS -DFF_HOMEZONE"
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15 CPPFLAGS="$CPPFLAGS -DFF_MMI_SAT_ICON"
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16 CPPFLAGS="$CPPFLAGS -DFF_MMI_SMS_DYNAMIC"
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17 CPPFLAGS="$CPPFLAGS -DFF_CPHS"
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18 CPPFLAGS="$CPPFLAGS -D_TMS470"
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19 CPPFLAGS="$CPPFLAGS -DUART"
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20 CPPFLAGS="$CPPFLAGS -DFF_ATI"
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21 CPPFLAGS="$CPPFLAGS -DNWARN"
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22 CPPFLAGS="$CPPFLAGS -DFF_EM_MODE"
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23 CPPFLAGS="$CPPFLAGS -DPHONEBOOK_EXTENSION"
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24
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25 if [ "$GPRS" = 1 ]
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26 then
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27 CPPFLAGS="$CPPFLAGS -DGPRS"
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28 fi
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29
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30 CPPFLAGS="$CPPFLAGS -DAT_INTERPRETER"
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31 CPPFLAGS="$CPPFLAGS -DUSE_L1FD_FUNC_INTERFACE"
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32
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33 if [ "$SRVC" != 0 ]
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34 then
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35 CPPFLAGS="$CPPFLAGS -DFAX_AND_DATA"
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36 if [ "$SRVC" = 1 ]
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37 then
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38 CPPFLAGS="$CPPFLAGS -DFF_FAX"
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39 fi
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40 CPPFLAGS="$CPPFLAGS -DUSE_L2FD_FUNC_INTERFACE"
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41 fi
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42
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43 CPPFLAGS="$CPPFLAGS -DSRVC=$SRVC"
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44 CPPFLAGS="$CPPFLAGS -DDTI2"
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45 CPPFLAGS="$CPPFLAGS -DDTILIB"
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46 CPPFLAGS="$CPPFLAGS -DPPP_INT_RAM"
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47 CPPFLAGS="$CPPFLAGS -DCHIPSET=$CHIPSET"
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48 CPPFLAGS="$CPPFLAGS -DBOARD=41"
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49
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50 if [ "$MEMSUPER" != 0 ]
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51 then
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52 CPPFLAGS="$CPPFLAGS -DMEMORY_SUPERVISION"
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53 fi
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54
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55 # Includes
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56
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57 SRCDIR=$SRC/g23m-fad/ppp
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58
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59 CPPFLAGS="$CPPFLAGS -I$SRC/condat/com/inc"
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60 CPPFLAGS="$CPPFLAGS -I$SRC/gpf/inc"
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61 CPPFLAGS="$CPPFLAGS -I$SRC/condat/com/include"
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62 CPPFLAGS="$CPPFLAGS -I../../cdg-hybrid/cdginc"
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63 CPPFLAGS="$CPPFLAGS -I$SRCDIR"
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64 CPPFLAGS="$CPPFLAGS -I../../cdg-hybrid/sap-inline"
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65 CPPFLAGS="$CPPFLAGS -I.."
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66 CPPFLAGS="$CPPFLAGS -I../config"
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67
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68 # Source modules
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69
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70 cfile_str2ind $SRCDIR/ppp_frxf.c
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71 cfile_str2ind $SRCDIR/ppp_ftxf.c
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72 cfile_str2ind $SRCDIR/ppp_tbls.c