FreeCalypso > hg > fc-tourmaline

annotate src/cs/system/bootloader/inc/target.h @ 51:04aaa5622fa7

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disable deep sleep when Iota LEDB is on TI's Iota chip docs say that CLK13M must be running in order for LEDB to work, and practical experience on Mot C139 which uses Iota LEDB for its keypad backlight concurs: if Calypso enters deep sleep while the keypad backlight is turned on, the light flickers visibly as the chipset goes into and out of deep sleep. TI's original L1 sleep manager code had logic to disable deep sleep when LT_Status() returns nonzero, but that function only works for B-Sample and C-Sample LT, always returns 0 on BOARD 41 - no check of Iota LEDB status anywhere. Change this code for our current hardware: disable deep sleep when Iota LEDB has been turned on through LLS.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 19 Oct 2020 05:11:29 +0000
parents 4e78acac3d88
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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1 /******************************************************************************
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2 * FLUID (Flash Loader Utility Independent of Device)
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3 *
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4 * (C) Delta Technologies 2001.
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5 * Cleanup, modifications and extensions by Mads Meisner-Jensen, mmj@ti.com.
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6 *
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7 * Target common definitions
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8 *
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9 * $Id: target.h,v 1.3 2003/07/10 17:50:21 rlendenmann Exp $
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10 *
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11 ******************************************************************************/
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12 #ifndef __TARGET_H__
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13 #define __TARGET_H__
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14 #include "protocol.h"
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15
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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16
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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17 /******************************************************************************
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18 * Typedefs and Prototypes
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19 ******************************************************************************/
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20
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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21 #ifndef RIVIERA_INCLUDED
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22 typedef unsigned char UBYTE;
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23 typedef unsigned short UINT16;
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24 typedef unsigned long UINT32;
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25 typedef signed char INT8;
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26 typedef signed short INT16;
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27 typedef signed long INT32;
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28 #endif
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29
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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30 typedef unsigned char uint8;
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31 typedef unsigned short uint16;
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32 typedef unsigned long uint32;
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33 typedef signed char int8;
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34 typedef signed short int16;
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35 typedef signed long int32;
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36
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37 typedef union {
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38 UINT32 i; // integer value
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39 UBYTE b[4]; // byte array
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40 } union32_t;
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41
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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42 typedef union {
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43 UINT16 i; // integer value
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44 UBYTE b[2]; // byte array
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Mychaela Falconia <falcon@freecalypso.org>
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45 } union16_t;
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46
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47 typedef struct {
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48 char (*init)(uint32 addr);
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49 char (*erase)(uint32 *addr, int size);
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50 char (*program)(uint32 addr, uint16 *buf, int size);
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51 uint8 (*getchar)(void);
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52 void (*putchar)(uint8 ch);
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53 void (*debug_putstr)(uint32 uart, char *string);
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Mychaela Falconia <falcon@freecalypso.org>
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54 void (*debug_putnum)(uint32 uart, unsigned int number);
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55 uint32 uart_base;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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56 } method_table_t;
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57
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58 // Prototypes for functions in debug.c
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59 void debug_putstr(uint32 uart, char *string);
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60 void debug_putnum(uint32 uart, unsigned int number);
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61
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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62
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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63 /******************************************************************************
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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64 * Macros
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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65 ******************************************************************************/
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66
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67 #define REGISTER_8_READ(addr) (*((volatile uint8 *) (addr)))
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68 #define REGISTER_8_WRITE(addr, data) (*((volatile uint8 *) (addr)) = data)
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69 #define REGISTER_16_READ(addr) (*((volatile uint16 *) (addr)))
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70 #define REGISTER_16_WRITE(addr, data) (*((volatile uint16 *) (addr)) = data)
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71
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72 #define BIT_SET(reg, bit) (*((volatile UINT16 *) (reg)) |= (1 << (bit)))
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73 #define BIT_CLR(reg, bit) (*((volatile UINT16 *) (reg)) &= ~(1 << (bit)))
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74
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75 #define FLASH_READ(addr) (*(volatile uint16 *) (addr))
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76 #define FLASH_WRITE(addr, data) (*(volatile uint16 *) (addr)) = data
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77
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78 #define PUTCHAR_FUNCTION_CODE(uart) \
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79 while (!(REGISTER_8_READ(uart + UART_LSR) & STAT_TXRDY)) ; \
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80 REGISTER_8_WRITE(uart + UART_THR, ch);
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81
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82 #define GETCHAR_FUNCTION_CODE(uart) \
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83 while (!(REGISTER_8_READ(uart + UART_LSR) & STAT_RXRDY)) ; \
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84 return (uint8) REGISTER_8_READ(uart + UART_RHR);
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85
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86
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87 /******************************************************************************
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88 * Debug Macros
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89 ******************************************************************************/
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90
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91 #define DEBUG_PUTSTR(uart, text) ((method_table_t *)(my_addr))->debug_putstr(uart, text);
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92 #define DEBUG_PUTNUM(uart, num) ((method_table_t *)(my_addr))->debug_putnum(uart, num);
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93
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94
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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95 /******************************************************************************
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96 * Hardware Definitions
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97 ******************************************************************************/
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98
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99 #define UART_BASE_MODEM (0xFFFF5800)
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100 #define UART_BASE_IRDA (0xFFFF5000)
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101
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102 // ROM/Flash Config register
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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103 #define WS_REG_ROM 0x400000
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104
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105 // UART register definitions.
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Mychaela Falconia <falcon@freecalypso.org>
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106 #define UART_RHR (0x00) /* Receive Holding Register */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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107 #define UART_THR (0x00) /* Transmit Holding Register */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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108 #define UART_FCR (0x02) /* FIFO Control Register */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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109 #define UART_LCR (0x03) /* Line Control Register */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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110 #define UART_LSR (0x05) /* Line Status Register */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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111 #define UART_MDR1 (0x08) /* Mode Definition Register 1 */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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112 #define UART_EFR (0x02) /* Enhanced Feature Register */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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113 #define UART_DLL (0x00) /* Divisor Latches */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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114 #define UART_DLH (0x01) /* Divisor Latches */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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115 #define UART_UIR (0xFFFF6000) /* UART Interface Register */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
116
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
117 // UART status bit definitions.
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
118 #define STAT_RXRDY (0x01)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 #define STAT_TXRDY (0x20)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 #define STAT_TX_E (0x40)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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121
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122 // UART_UIR bit definitions.
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 #define UART_ACCESS (0)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 #define UART_MASK_IT (1)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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125
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 // UART_EFR bit definitions.
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 #define ENHANCED_EN (4)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 // UART command bit definitions.
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 #define CMD_UART_RESET (0x07)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 #define CMD_EFR_EN (0xBF)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 #define CMD_FCR_MCR_EN (0x80)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 #define CMD_FIFO_EN (0x07)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 #define CMD_UART_MODE (0x00)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 #define CMD_CHAR8_STOP1_NOPAR (0x03)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 // UART ???
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 #define BAUD_38400 (0x15)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 #define BAUD_115200 (0x07)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 #define BAUD_406250 (0x02)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 #define BAUD_812500 (0x01)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 // Enable/Disable ROM/Flash write strobe
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 #define ROM_WRITE_ENABLE() *((volatile uint16*) WS_REG_ROM) |= 0x80;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 #define ROM_WRITE_DISABLE() *((volatile uint16*) WS_REG_ROM) &= ~0x80;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 #endif /* __TARGET_H__ */