FreeCalypso > hg > fc-tourmaline
annotate src/g23m-fad/ra/ra_rlp.c @ 287:3dee79757ae4
UI fw: load handheld audio mode on boot
We have now reached the point where use of audio mode config files
should be considered mandatory. In ACI usage we can tell users that
they need to perform an AT@AUL of some appropriate audio mode, but
in UI-enabled fw we really need to have the firmware load audio modes
on its own, so that correct audio config gets established when the
handset or development board runs on its own, without a connected host
computer.
Once have FC Venus with both main and headset audio channels and
headset plug insertion detection, our fw will need to automatically
load the handheld mode or the headset mode depending on the plug
insertion state. For now we load only the handheld mode, which has
been tuned for FC-HDS4 on FC Luna.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Sat, 13 Nov 2021 03:20:57 +0000 |
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rev | line source |
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1
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1 /* |
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2 +----------------------------------------------------------------------------- |
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3 | Project : GSM-F&D (8411) |
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4 | Modul : RA_RLP |
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5 +----------------------------------------------------------------------------- |
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6 | Copyright 2002 Texas Instruments Berlin, AG |
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7 | All rights reserved. |
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8 | |
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9 | This file is confidential and a trade secret of Texas |
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10 | Instruments Berlin, AG |
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11 | The receipt of or possession of this file does not convey |
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12 | any rights to reproduce or disclose its contents or to |
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13 | manufacture, use, or sell anything it may describe, in |
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14 | whole, or in part, without the specific written consent of |
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15 | Texas Instruments Berlin, AG. |
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16 +----------------------------------------------------------------------------- |
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17 | Purpose : This Modul defines the functions for the non-transparent |
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18 | data model (RLP) for the component RA of the mobile |
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19 | station |
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20 +----------------------------------------------------------------------------- |
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21 */ |
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22 |
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23 #ifndef RA_RLP_C |
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24 #define RA_RLP_C |
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25 #endif |
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26 |
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27 #define ENTITY_RA |
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28 |
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29 /*==== INCLUDES ===================================================*/ |
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30 |
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31 #include <string.h> |
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32 #include "typedefs.h" |
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33 #include "vsi.h" |
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34 #include "macdef.h" |
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35 #include "pconst.cdg" |
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36 #include "custom.h" |
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37 #include "gsm.h" |
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38 #include "cnf_ra.h" |
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39 #include "prim.h" |
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40 #include "pei.h" |
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41 #include "tok.h" |
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42 #include "ccdapi.h" |
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43 #include "ra.h" |
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44 |
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45 /*==== CONST ======================================================*/ |
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46 /*==== TYPES ======================================================*/ |
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47 /*==== VARIABLES ==================================================*/ |
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48 /*==== FUNCTIONS ==================================================*/ |
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49 |
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50 /* |
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51 +--------------------------------------------------------------------+ |
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52 | PROJECT : GSM-F&D (8411) MODULE : RA_RLP | |
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53 | STATE : code ROUTINE : rlp_init | |
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54 +--------------------------------------------------------------------+ |
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55 |
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56 PURPOSE : |
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57 |
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58 */ |
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59 |
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60 GLOBAL void rlp_init(void) |
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61 { |
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62 TRACE_FUNCTION("rlp_init()"); |
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63 |
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64 memset(ra_data->rlp, 0, sizeof(T_RLP)); |
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65 hCommRLP = vsi_c_open ( VSI_CALLER RLP_NAME ); |
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66 hCommMMI = vsi_c_open ( VSI_CALLER ACI_NAME ); |
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67 } |
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68 |
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69 /* |
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70 +--------------------------------------------------------------------+ |
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71 | PROJECT : GSM-F&D (8411) MODULE : RA_RLP | |
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72 | STATE : code ROUTINE : rlp_idle | |
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73 +--------------------------------------------------------------------+ |
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74 |
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75 PURPOSE : IDLE processing fpr uplink and downlink non-transparent mode |
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76 */ |
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77 |
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78 GLOBAL void rlp_idle(void) |
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79 { |
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80 TRACE_FUNCTION("rlp_idle()"); |
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81 } |
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82 |
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83 /* |
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84 +--------------------------------------------------------------------+ |
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85 | PROJECT : GSM-F&D (8411) MODULE : RA_RLP | |
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86 | STATE : code ROUTINE : rlp_ul_null | |
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87 +--------------------------------------------------------------------+ |
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88 |
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89 PURPOSE : |
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90 */ |
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91 |
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92 GLOBAL void rlp_ul_null(void) |
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93 { |
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94 T_RLP *drlp = ra_data->rlp; |
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95 UBYTE i; |
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96 |
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97 TRACE_FUNCTION("rlp_ul_null()"); |
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98 |
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99 if (ra_data->activated) |
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100 { |
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101 #ifdef TRACE_RA_RLP |
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102 drlp->fcs_error = 0L; |
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103 #endif |
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104 /* |
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105 * setup the communication parameters |
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106 */ |
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107 shm_set_dsp_value (conf_b_itc, V_ITC_DATA); |
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108 shm_set_dsp_value (conf_b_ce, V_CE_NON_TRANSP); |
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109 |
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110 switch (ra_data->tra_rate) |
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111 { |
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112 case TRA_FULLRATE_14400: |
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113 shm_set_dsp_value (conf_b_ur, V_UR_14400); |
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114 shm_set_dsp_value (conf_b_ct, V_CT_FR); |
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115 break; |
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116 |
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117 case TRA_FULLRATE_9600: |
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118 shm_set_dsp_value (conf_b_ur, V_UR_9600); |
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119 shm_set_dsp_value (conf_b_ct, V_CT_FR); |
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120 break; |
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121 |
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122 case TRA_FULLRATE_4800: |
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123 shm_set_dsp_value (conf_b_ur, V_UR_4800); |
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124 shm_set_dsp_value (conf_b_ct, V_CT_FR); |
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125 break; |
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126 |
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127 case TRA_HALFRATE_4800: |
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128 shm_set_dsp_value (conf_b_ur, V_UR_4800); |
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129 shm_set_dsp_value (conf_b_ct, V_CT_HR); |
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130 break; |
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131 |
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132 default: |
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133 break; |
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134 } |
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135 |
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136 shm_set_dsp_value (ntu_M1, 0); |
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137 shm_set_dsp_value (ntu_M2, 0); |
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138 shm_set_dsp_value (ntu_empty, 1); |
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139 shm_set_dsp_value (ntu_byte_cnt, 2); |
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140 |
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141 /* |
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142 * initialize the non-transparent mode data |
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143 */ |
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144 drlp->ul_data_pending = FALSE; |
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145 drlp->m1 = 0; |
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146 |
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147 ra_data->ra_data_ind.fr_type = FR_RLP; |
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148 ra_data->ra_data_ind.sdu.o_buf = 0; |
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149 ra_data->ra_data_ind.sdu.l_buf = 0; |
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150 |
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151 ra_data->ra_ready_ind[0].req_frames = 1; |
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152 |
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153 cl_ribu_init(&drlp->ulq, RLP_UL_QSIZE); |
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154 |
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155 for (i = 0; i < drlp->ulq.depth; i++) |
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156 { |
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|
157 cl_set_frame_desc_0(&drlp->ul_frame_desc[i], NULL, 0); |
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158 } |
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159 |
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|
160 cl_set_frame_desc_0(&ra_data->rlp->dl_frame_desc, NULL, 0); |
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161 shm_set_dsp_value (act_b_init, 1); |
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162 |
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|
163 INIT_STATE (KER, RLP_INIT_L1); |
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|
164 |
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|
165 #ifdef HO_WORKAROUND /* rlp_ul_null */ |
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166 _act_d_ra_conf = *ra_data->shm.shm_addr[d_ra_conf]; |
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167 TRACE_EVENT("d_ra_conf saved"); |
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|
168 #endif |
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169 |
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|
170 } |
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|
171 } |
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172 |
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|
173 /* |
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|
174 +--------------------------------------------------------------------+ |
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175 | PROJECT : GSM-F&D (8411) MODULE : RA_RLP | |
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176 | STATE : code ROUTINE : rlp_ul_init_l1 | |
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177 +--------------------------------------------------------------------+ |
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178 |
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|
179 PURPOSE : |
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|
180 |
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|
181 */ |
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182 |
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|
183 GLOBAL void rlp_ul_init_l1(void) |
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184 { |
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|
185 TRACE_FUNCTION("rlp_ul_init_l1()"); |
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186 |
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|
187 if (shm_get_dsp_value (act_b_init) EQ 0) |
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|
188 { |
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|
189 /* |
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190 * initialisation finished -> enter the data transmission state |
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|
191 */ |
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|
192 l1i_ra_activate_cnf(); |
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193 SET_STATE (KER, RLP_DATA_TRANS); |
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194 } |
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|
195 } |
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196 |
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|
197 /* |
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|
198 +--------------------------------------------------------------------+ |
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|
199 | PROJECT : GSM-F&D (8411) MODULE : RA_RLP | |
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200 | STATE : code ROUTINE : rlp_ul_data_trans | |
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201 +--------------------------------------------------------------------+ |
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|
202 |
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|
203 PURPOSE : |
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|
204 */ |
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|
205 |
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|
206 GLOBAL void rlp_ul_data_trans(void) |
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207 { |
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|
208 T_RLP *drlp = ra_data->rlp; |
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209 |
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|
210 TRACE_FUNCTION("rlp_ul_data_trans()"); |
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211 |
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|
212 if (drlp->ul_data_pending) /* a frame is ready to be sent */ |
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|
213 { |
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|
214 USHORT len = 0; |
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|
215 |
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|
216 switch (ra_data->tra_rate) |
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217 { |
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|
218 case TRA_FULLRATE_9600: |
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219 case TRA_HALFRATE_4800: |
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220 len = NT_DATA_SIZE; |
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|
221 drlp->ul_data_pending = FALSE; |
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|
222 break; |
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|
223 |
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|
224 case TRA_FULLRATE_4800: |
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225 /* S844: 1=1st half, 0=2nd half */ |
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|
226 if (shm_get_dsp_value (act_b_f48blk_ul) EQ 1) |
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|
227 { |
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|
228 TRACE_FUNCTION("send 4800 first half"); |
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229 len = NT_DATA_SIZE_4800_FR_A; |
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|
230 drlp->ul_48_first_half_sent = TRUE; |
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|
231 } |
fa8dc04885d8
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|
232 else |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
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|
233 { |
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|
234 if (drlp->ul_48_first_half_sent) |
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|
235 { |
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|
236 TRACE_FUNCTION("send 4800 second half"); |
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|
237 len = NT_DATA_SIZE_4800_FR_B; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
238 drlp->ul_data_pending = FALSE; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
239 drlp->ul_frame_desc[drlp->ulq.ri].Adr[0] += NT_DATA_SIZE_4800_FR_A; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
240 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
241 else |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
242 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
243 TRACE_FUNCTION("wait for 4800 first half"); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
244 len = 0; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
245 } |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
246 } |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
247 break; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
248 |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
249 case TRA_FULLRATE_14400: |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
250 shm_set_dsp_value (ntu_M1, drlp->m1); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
251 /* S844: 0 = first half, 1 = second half */ |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
252 if (drlp->m1 EQ 0) |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
253 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
254 len = NT_DATA_SIZE_14400_A; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
255 drlp->m1 = 1; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
256 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
257 else |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
258 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
259 len = NT_DATA_SIZE_14400_B; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
260 drlp->ul_data_pending = FALSE; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
261 drlp->ul_frame_desc[drlp->ulq.ri].Adr[0] += NT_DATA_SIZE_14400_A; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
262 } |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
263 break; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
264 } |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
265 if (len > 0) |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
266 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
267 shm_set_dsp_buffer(&drlp->ul_frame_desc[drlp->ulq.ri], |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
268 ra_data->shm.shm_addr[adr_ntu_data]+wof_ntu_data, 0, len); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
269 shm_set_dsp_value (ntu_empty, 0); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
270 shm_set_dsp_value (ntu_byte_cnt, (len+2)); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
271 if (!drlp->ul_data_pending) |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
272 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
273 cl_ribu_read_index(&drlp->ulq); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
274 /* PZ 22.7.99 */ |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
275 drlp->ul_data_pending = (drlp->ulq.ri NEQ drlp->ulq.wi); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
276 /* PZ 22.7.99 */ |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
277 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
278 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
279 else |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
280 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
281 shm_set_dsp_value (ntu_M1, 0); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
282 shm_set_dsp_value (ntu_empty, 1); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
283 shm_set_dsp_value (ntu_byte_cnt, 2); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
284 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
285 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
286 else |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
287 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
288 /* no frame is ready to be sent */ |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
289 shm_set_dsp_value (ntu_M1, 0); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
290 shm_set_dsp_value (ntu_empty, 1); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
291 shm_set_dsp_value (ntu_byte_cnt, 2); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
292 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
293 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
294 if (!drlp->ul_data_pending) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
295 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
296 l1i_ra_ready_ind(hCommRLP, 0); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
297 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
298 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
299 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
300 /* |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
301 +--------------------------------------------------------------------+ |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
302 | PROJECT : GSM-F&D (8411) MODULE : RA_RLP | |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
303 | STATE : code ROUTINE : rlp_dl_data_trans | |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
304 +--------------------------------------------------------------------+ |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
305 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
306 PURPOSE : |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
307 */ |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
308 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
309 GLOBAL void rlp_dl_data_trans(void) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
310 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
311 BOOL frame_complete = FALSE; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
312 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
313 TRACE_FUNCTION("rlp_dl_data_trans()"); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
314 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
315 #ifdef HO_WORKAROUND /* rlp_dl_data_trans */ |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
316 if (*ra_data->shm.shm_addr[d_ra_conf] NEQ _act_d_ra_conf) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
317 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
318 *ra_data->shm.shm_addr[d_ra_conf] = _act_d_ra_conf; /* rlp_dl_data_trans */ |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
319 TRACE_EVENT("HO_REFRESH rlp_dl_data_trans"); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
320 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
321 #endif |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
322 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
323 /* |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
324 * read out the received downlink data |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
325 */ |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
326 if (shm_get_dsp_value (ntd_byte_cnt) > 0) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
327 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
328 USHORT len = 0; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
329 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
330 switch (ra_data->tra_rate) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
331 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
332 case TRA_FULLRATE_9600: |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
333 case TRA_HALFRATE_4800: |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
334 if (shm_get_dsp_value (ntd_fcs_ok) EQ 0) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
335 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
336 frame_complete = TRUE; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
337 len = NT_DATA_SIZE; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
338 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
339 #ifdef _SIMULATION_ |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
340 cl_set_frame_desc_0(&ra_data->rlp->dl_frame_desc, ra_data->rlp->dl_buf, NT_DATA_SIZE); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
341 ra_data->ra_data_ind.sdu.l_buf = NT_DATA_SIZE << 3; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
342 #else |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
343 rlp_rbm_get_next_buffer(&ra_data->rlp->dl_frame_desc); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
344 #endif |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
345 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
346 else |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
347 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
348 #ifdef TRACE_RA_RLP |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
349 TRACE_EVENT("FCS-Error"); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
350 ra_data->rlp->fcs_error++; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
351 #endif |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
352 frame_complete = FALSE; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
353 len = 0; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
354 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
355 break; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
356 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
357 case TRA_FULLRATE_4800: |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
358 /* S844: 0=1st half, 1=2nd half */ |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
359 if (shm_get_dsp_value (act_b_f48blk_dl) EQ 0) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
360 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
361 len = NT_DATA_SIZE_4800_FR_A; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
362 frame_complete = FALSE; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
363 #ifdef _SIMULATION_ |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
364 cl_set_frame_desc_0(&ra_data->rlp->dl_frame_desc, ra_data->rlp->dl_buf, NT_DATA_SIZE_4800_FR_A+NT_DATA_SIZE_4800_FR_B); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
365 ra_data->ra_data_ind.sdu.l_buf = (NT_DATA_SIZE_4800_FR_A+NT_DATA_SIZE_4800_FR_B) << 3; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
366 #else |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
367 rlp_rbm_get_next_buffer(&ra_data->rlp->dl_frame_desc); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
368 #endif |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
369 } |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
370 else if (shm_get_dsp_value (ntd_fcs_ok) EQ 0) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
371 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
372 frame_complete = TRUE; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
373 len = NT_DATA_SIZE_4800_FR_B; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
374 ra_data->rlp->dl_frame_desc.Adr[0] += NT_DATA_SIZE_4800_FR_A; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
375 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
376 else |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
377 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
378 #ifdef TRACE_RA_RLP |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
379 TRACE_EVENT("FCS-Error"); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
380 ra_data->rlp->fcs_error++; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
381 #endif |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
382 frame_complete = FALSE; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
383 len = 0; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
384 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
385 break; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
386 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
387 case TRA_FULLRATE_14400: |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
388 /* S844: 0 = first half, 1 = second half */ |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
389 if (shm_get_dsp_value (ntd_M1) EQ 0) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
390 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
391 frame_complete = FALSE; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
392 len = NT_DATA_SIZE_14400_A; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
393 #ifdef _SIMULATION_ |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
394 cl_set_frame_desc_0(&ra_data->rlp->dl_frame_desc, ra_data->rlp->dl_buf, NT_DATA_SIZE_14400_A + NT_DATA_SIZE_14400_B); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
395 ra_data->ra_data_ind.sdu.l_buf = (NT_DATA_SIZE_14400_A + NT_DATA_SIZE_14400_B) << 3; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
396 #else |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
397 rlp_rbm_get_next_buffer(&ra_data->rlp->dl_frame_desc); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
398 #endif |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
399 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
400 else if (shm_get_dsp_value (ntd_fcs_ok) EQ 0) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
401 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
402 frame_complete = TRUE; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
403 len = NT_DATA_SIZE_14400_B; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
404 ra_data->rlp->dl_frame_desc.Adr[0] += NT_DATA_SIZE_14400_A; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
405 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
406 else |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
407 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
408 #ifdef TRACE_RA_RLP |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
409 TRACE_EVENT("FCS-Error"); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
410 ra_data->rlp->fcs_error++; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
411 #endif |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
412 frame_complete = FALSE; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
413 len = 0; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
414 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
415 break; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
416 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
417 if (len > 0) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
418 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
419 shm_get_dsp_buffer(&ra_data->rlp->dl_frame_desc, ra_data->shm.shm_addr[adr_ntd_data]+wof_ntd_data, len); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
420 shm_set_dsp_value (ntd_byte_cnt, 0); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
421 |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
422 if (frame_complete) |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
423 { |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
424 l1i_ra_data_ind(hCommRLP); |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
425 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
426 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
427 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
428 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
429 |