FreeCalypso > hg > fc-tourmaline
annotate src/cs/drivers/drv_app/spi/spi_task.c @ 273:5caa86ee2cfa
enable L1_NEW_AEC in l1_confg.h (bold change)
The AEC function implemented in DSP ROM 3606 on the Calypso silicon
we work with is the one that corresponds to L1_NEW_AEC; the same holds
for DSP 34 and even for DSP 33 with more recent patch versions.
However, TI shipped their TCS211 reference fw with L1_NEW_AEC set to 0,
thus driving AEC the old way if anyone tried to enable it, either via
AT%Nxxxx or via the audio mode facility. As a result, the fw would
try to control features which no longer exist in the DSP (long vs short
echo and the old echo suppression level bits), while providing no way
to tune the 8 new parameter words added to the DSP's NDB page.
The only sensible solution is to bite the bullet and enable L1_NEW_AEC
in L1 config, with fallout propagating into RiViera Audio Service
T_AUDIO_AEC_CFG structure and into /aud/*.cfg binary file format.
The latter fallout will be addressed in further code changes.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 29 Jul 2021 18:32:40 +0000 |
parents | 34b7059b9337 |
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rev | line source |
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1 /*****************************************************************************/ |
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2 /* */ |
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3 /* Name spi_task.c */ |
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4 /* */ |
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5 /* Function this file contains the main SPI function: spi_core. */ |
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6 /* It contains the body of the SPI task. */ |
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7 /* It will initialize the SPI and then wait for messages */ |
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8 /* or functions calls. */ |
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9 /* */ |
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10 /* Version 0.1 */ |
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11 /* Author Candice Bazanegue */ |
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12 /* */ |
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13 /* Date Modification */ |
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14 /* ------------------------------------ */ |
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15 /* 20/08/2000 Create */ |
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16 /* 01/09/2003 Modfication */ |
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17 /* Author Pascal Puel */ |
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18 /* */ |
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19 /* (C) Copyright 2000 by Texas Instruments Incorporated, All Rights Reserved */ |
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20 /*****************************************************************************/ |
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21 |
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22 #ifndef _WINDOWS |
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23 #include "chipset.cfg" |
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24 #if (CHIPSET == 12) |
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25 #include "inth/sys_inth.h" |
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26 #else |
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27 #include "inth/iq.h" // for IQ_Unmask() |
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28 #endif |
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29 #include "power/power.h" // for Switch_ON() |
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30 #endif |
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31 |
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32 #include "rv/rv_defined_swe.h" // for RVM_PWR_SWE |
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33 #include "rvm/rvm_use_id_list.h" |
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34 #include "spi/spi_env.h" |
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35 #include "spi/spi_process.h" |
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36 #include "spi/spi_task.h" |
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37 |
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38 #ifdef RVM_PWR_SWE |
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39 #include "pwr/pwr_liion_cha.h" |
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40 #include "pwr/pwr_disch.h" |
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41 #include "pwr/pwr_process.h" |
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42 #include "pwr/pwr_env.h" |
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43 #endif |
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44 |
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45 |
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46 /******************************************************************************* |
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47 ** Function spi_core |
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48 ** |
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49 ** Description Core of the spi task, which initiliazes the spi SWE and |
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50 ** waits for messages. |
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51 ** |
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52 *******************************************************************************/ |
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53 T_RV_RET spi_core(void) |
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54 { |
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55 BOOLEAN error_occured = FALSE; |
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56 T_RV_HDR * msg_ptr; |
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57 |
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58 rvf_send_trace("SPI_task: Initialization", 24, NULL_PARAM, RV_TRACE_LEVEL_DEBUG_LOW, SPI_USE_ID); |
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59 SPI_GBL_INFO_PTR->SpiTaskReady = TRUE; |
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60 |
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61 #ifndef _WINDOWS |
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62 /* Unmask External Interrupt once the SPI task is started */ |
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63 #if (CHIPSET == 12) |
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64 // Unmask ABB ext interrupt |
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65 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT); |
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66 #else |
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67 // Unmask external (ABB) interrupt |
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68 IQ_Unmask(IQ_EXT); |
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69 #endif |
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70 // Get the switch on cause from ABB. |
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71 Set_Switch_ON_Cause(); |
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72 #endif |
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73 |
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74 /* loop to process messages */ |
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75 while (error_occured == FALSE) |
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76 { |
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77 /* Wait for the necessary events (infinite wait for a msg in the mailbox 0). */ |
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78 UINT16 received_event = rvf_wait (0xffff, 0); |
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79 |
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80 /* If an event related to mailbox 0 is received, then */ |
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81 if (received_event & RVF_TASK_MBOX_0_EVT_MASK) |
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82 { |
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83 /* Read the message in the driver mailbox and delegate action..*/ |
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84 msg_ptr = (T_RV_HDR *) rvf_read_mbox(SPI_MAILBOX); |
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85 |
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86 #ifdef RVM_PWR_SWE |
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87 if(spi_process(msg_ptr)) |
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88 { |
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89 pwr_process(msg_ptr); |
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90 } |
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91 #else |
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92 spi_process(msg_ptr); |
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93 #endif |
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94 } |
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95 |
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96 #ifdef RVM_PWR_SWE |
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97 /* Timers */ |
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98 if (received_event & SPI_TIMER0_WAIT_EVENT) |
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99 { |
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100 pwr_bat_test_timer_process(); |
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101 } |
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102 |
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103 if (received_event & SPI_TIMER1_WAIT_EVENT) |
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104 /* timer used to detect the end of the CI charge */ |
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105 { |
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106 pwr_CI_charge_timer_process(); |
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107 } |
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108 |
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109 if (received_event & SPI_TIMER2_WAIT_EVENT) |
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110 /* timer used to detect the end of the CV charge */ |
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111 { |
0
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112 pwr_CV_charge_timer_process(); |
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113 } |
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114 |
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115 if (received_event & SPI_TIMER3_WAIT_EVENT) |
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116 /* timer used to check the battery discharge level */ |
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117 { |
0
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118 pwr_discharge_timer_process(); |
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119 } |
260
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120 #endif |
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121 } // end of while |
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122 return RV_OK; |
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123 } |
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124 |
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125 |
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126 /********************************************************************************** |
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127 * Function : spi_adc_on |
0
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128 * |
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129 * Description : Put the variable is_adc_on of the T_SPI_GBL_INFO structure to TRUE. |
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130 * This variable is used for the battery management. |
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131 * This function is called by the CST entity. |
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132 * |
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133 * Parameters : None |
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134 * |
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135 * Return : None |
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136 * |
0
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137 **********************************************************************************/ |
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138 void spi_adc_on (void) |
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139 { |
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140 SPI_GBL_INFO_PTR->is_adc_on = TRUE; |
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141 |
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142 rvf_send_trace("SPI: ADC are on",15, |
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143 NULL_PARAM, |
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144 RV_TRACE_LEVEL_DEBUG_LOW, |
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145 SPI_USE_ID); |
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146 } |