FreeCalypso > hg > fc-tourmaline

annotate src/cs/drivers/drv_app/spi/spi_task.h @ 273:5caa86ee2cfa

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enable L1_NEW_AEC in l1_confg.h (bold change) The AEC function implemented in DSP ROM 3606 on the Calypso silicon we work with is the one that corresponds to L1_NEW_AEC; the same holds for DSP 34 and even for DSP 33 with more recent patch versions. However, TI shipped their TCS211 reference fw with L1_NEW_AEC set to 0, thus driving AEC the old way if anyone tried to enable it, either via AT%Nxxxx or via the audio mode facility. As a result, the fw would try to control features which no longer exist in the DSP (long vs short echo and the old echo suppression level bits), while providing no way to tune the 8 new parameter words added to the DSP's NDB page. The only sensible solution is to bite the bullet and enable L1_NEW_AEC in L1 config, with fallout propagating into RiViera Audio Service T_AUDIO_AEC_CFG structure and into /aud/*.cfg binary file format. The latter fallout will be addressed in further code changes.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 29 Jul 2021 18:32:40 +0000
parents 34b7059b9337
children
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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1 /*****************************************************************************/
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2 /* */
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3 /* Name spi_task.h */
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4 /* */
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5 /* Function this file contains timers definitions used by spi_core, */
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6 /* in case the PWR SWE is defined. */
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7 /* */
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8 /* Version 0.1 */
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9 /* Author Candice Bazanegue */
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10 /* */
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11 /* Date Modification */
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12 /* ------------------------------------ */
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13 /* 20/08/2000 Create */
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14 /* 01/09/2003 Modfication */
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15 /* Author Pascal Puel */
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16 /* */
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17 /* (C) Copyright 2000 by Texas Instruments Incorporated, All Rights Reserved */
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18 /*****************************************************************************/
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20 #ifndef _SPI_TASK_H_
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21 #define _SPI_TASK_H_
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23 #include "rv/rv_defined_swe.h" // for RVM_PWR_SWE
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25 #ifdef RVM_PWR_SWE
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27 #include "pwr/pwr_cust.h"
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29 #define SPI_TIMER0 (RVF_TIMER_0)
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30 #define SPI_TIMER0_INTERVAL_1 (PWR_BAT_TEST_TIME_1)
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31 #define SPI_TIMER0_INTERVAL_2 (PWR_BAT_TEST_TIME_2)
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32 #define SPI_TIMER0_INTERVAL_3 (PWR_CALIBRATION_TIME_1)
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33 #define SPI_TIMER0_INTERVAL_4 (PWR_CALIBRATION_TIME_2)
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34 #define SPI_TIMER0_WAIT_EVENT (RVF_TIMER_0_EVT_MASK)
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36 #define SPI_TIMER1 (RVF_TIMER_1)
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37 #define SPI_TIMER1_INTERVAL (PWR_CI_CHECKING_TIME)
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38 #define SPI_TIMER1_WAIT_EVENT (RVF_TIMER_1_EVT_MASK)
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40 #define SPI_TIMER2 (RVF_TIMER_2)
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41 #define SPI_TIMER2_INTERVAL (PWR_CV_CHECKING_TIME)
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42 #define SPI_TIMER2_WAIT_EVENT (RVF_TIMER_2_EVT_MASK)
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44 #define SPI_TIMER3 (RVF_TIMER_3)
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45 #define SPI_TIMER3_INTERVAL (PWR_DISCHARGE_CHECKING_TIME_1)
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46 #define SPI_TIMER3_INTERVAL_BIS (PWR_DISCHARGE_CHECKING_TIME_2)
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47 #define SPI_TIMER3_WAIT_EVENT (RVF_TIMER_3_EVT_MASK)
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49 #endif // RVM_PWR_SWE
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52 // Prototypes
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53 void spi_adc_on (void);
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54 T_RV_RET spi_core(void);
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56 #endif // _SPI_TASK_H_