FreeCalypso > hg > fc-tourmaline
annotate src/cs/system/template/gsm_ds_int8.template @ 273:5caa86ee2cfa
enable L1_NEW_AEC in l1_confg.h (bold change)
The AEC function implemented in DSP ROM 3606 on the Calypso silicon
we work with is the one that corresponds to L1_NEW_AEC; the same holds
for DSP 34 and even for DSP 33 with more recent patch versions.
However, TI shipped their TCS211 reference fw with L1_NEW_AEC set to 0,
thus driving AEC the old way if anyone tried to enable it, either via
AT%Nxxxx or via the audio mode facility. As a result, the fw would
try to control features which no longer exist in the DSP (long vs short
echo and the old echo suppression level bits), while providing no way
to tune the 8 new parameter words added to the DSP's NDB page.
The only sensible solution is to bite the bullet and enable L1_NEW_AEC
in L1 config, with fallout propagating into RiViera Audio Service
T_AUDIO_AEC_CFG structure and into /aud/*.cfg binary file format.
The latter fallout will be addressed in further code changes.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Thu, 29 Jul 2021 18:32:40 +0000 |
parents | 4e78acac3d88 |
children |
rev | line source |
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0
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1 /* |
4e78acac3d88
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2 * Integrated Protocol Stack Linker command file (all components) |
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3 * |
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4 * Target : ARM |
4e78acac3d88
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5 * |
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6 * Copyright (c) Texas Instruments 2002, Condat 2002 |
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7 * |
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8 */ |
4e78acac3d88
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9 |
4e78acac3d88
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10 -c /* Autoinitialize variables at runtime */ |
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11 |
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12 /*********************************/ |
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13 /* SPECIFY THE SYSTEM MEMORY MAP */ |
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14 /*********************************/ |
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15 |
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16 MEMORY |
4e78acac3d88
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17 { |
4e78acac3d88
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18 /* CS0: Flash 8 Mbytes ****************************************************/ |
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19 /* Interrupt Vectors Table */ |
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20 I_MEM (RXI) : org = 0x00000000 len = 0x00000100 |
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21 |
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22 /* Boot Sector */ |
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23 B_MEM (RXI) : org = 0x00000100 len = 0x00001f00 |
4e78acac3d88
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24 |
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25 /* Magic Word for Calypso Boot ROM */ |
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26 MWC_MEM (RXI) : org = 0x00002000 len = 0x00000004 fill = 0x0000001 |
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27 |
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28 /* Program Memory */ |
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29 P_MEM1 (RXI) : org = 0x00010000 len = 0x00000700 |
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30 P_MEM2 (RXI) : org = 0x00010700 len = 0x003ef900 |
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31 P_MEM3 (RXI) : org = 0x00400000 len = 0x00300000 |
4e78acac3d88
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32 |
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33 /* FFS Area */ |
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34 FFS_MEM (RX) : org = 0x00700000 len = 0x00100000 |
4e78acac3d88
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35 /**************************************************************************/ |
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36 |
4e78acac3d88
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37 /* CS1: External SRAM 1 Mbytes ********************************************/ |
4e78acac3d88
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38 /* Data Memory */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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39 D_MEM1 (RW) : org = 0x01000000 len = 0x00100000 |
4e78acac3d88
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40 /**************************************************************************/ |
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41 |
4e78acac3d88
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42 /* CS2: External SRAM 8 Mbytes ********************************************/ |
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43 /* Data Memory */ |
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44 D_MEM2 (RW) : org = 0x01800000 len = 0x00800000 |
4e78acac3d88
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45 /**************************************************************************/ |
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46 |
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47 /* CS6: Calypso Internal SRAM 512 kbytes **********************************/ |
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48 /* Code & Variables Memory */ |
4e78acac3d88
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49 S_MEM (RXW) : org = 0x00800000 len = 0x00080000 |
4e78acac3d88
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50 /**************************************************************************/ |
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51 } |
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52 |
4e78acac3d88
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53 /***********************************************/ |
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54 /* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ |
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55 /***********************************************/ |
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56 |
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57 /* |
4e78acac3d88
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58 * Since the bootloader directly calls the INT_Initialize() routine located |
4e78acac3d88
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59 * in int.s, this int.s code must always be mapped at the same address |
4e78acac3d88
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60 * (usually in the second flash sector). Its length is about 0x500 bytes. |
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61 * Then comes the code that need to be loaded into the internal RAM. |
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62 */ |
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63 |
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64 SECTIONS |
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65 { |
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66 .intvecs : {} > I_MEM /* Interrupt Vectors Table */ |
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67 .monitor : > B_MEM /* Monitor Constants & Code */ |
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68 { |
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69 $(CONST_BOOT_LIB) |
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70 } |
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71 |
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72 .inttext : {} > P_MEM1 /* int.s Code */ |
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73 |
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74 .bss_dar : > S_MEM /* DAR SWE Variables */ |
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75 { |
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76 $(BSS_DAR_LIB) |
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77 } |
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78 |
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79 .bss : > D_MEM1 /* Global & Static Variables */ |
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80 { |
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81 $(BSS_BOOT_LIB) |
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82 } |
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83 |
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84 /* |
4e78acac3d88
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85 * The rest of the code and constants is mapped in flash. |
4e78acac3d88
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86 */ |
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87 |
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88 .cinit : {} > P_MEM2 /* Initialization Tables */ |
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89 .const : {} > P_MEM2 /* Constant Data */ |
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90 .text : {} > P_MEM2 /* Code */ |
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91 |
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92 .stackandheap : > S_MEM /* System Stacks, etc... */ |
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93 { |
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94 /* Leave 20 32bit words for register pushes. */ |
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95 . = align(8); |
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96 . += 20 * 4; |
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97 |
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98 /* Stack for abort and/or undefined modes. */ |
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99 exception_stack = .; |
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100 |
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101 /* Leave 38 32bit words for state saving on exceptions. */ |
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102 _xdump_buffer = .; |
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103 . += 38 * 4; |
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104 . = align(8); |
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105 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
106 /* Beginning of stacks and heap area - 2.75 kbytes (int.s) */ |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
107 stack_segment = .; |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
108 . += 0xB00; |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
109 } |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
110 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
111 .data : {} > S_MEM /* Initialized Data */ |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
112 .sysmem : {} > S_MEM /* Dynamic Memory Allocation Area */ |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
113 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
114 } |