FreeCalypso > hg > fc-tourmaline

annotate src/g23m-fad/l2r/l2r_dnp.c @ 128:6cca8d6d34d3

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mmiTimeDate.h: bogotab fixes
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 10 Nov 2020 06:39:53 +0000 (2020-11-10)
parents fa8dc04885d8
children
Ignore whitespace changes - Everywhere: Within whitespace: At end of lines:
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1
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1 /*
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2 +-----------------------------------------------------------------------------
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3 | Project : CSD (8411)
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4 | Modul : L2r_dnp.c
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5 +-----------------------------------------------------------------------------
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6 | Copyright 2002 Texas Instruments Berlin, AG
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7 | All rights reserved.
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8 |
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9 | This file is confidential and a trade secret of Texas
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10 | Instruments Berlin, AG
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11 | The receipt of or possession of this file does not convey
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12 | any rights to reproduce or disclose its contents or to
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13 | manufacture, use, or sell anything it may describe, in
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14 | whole, or in part, without the specific written consent of
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15 | Texas Instruments Berlin, AG.
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16 +-----------------------------------------------------------------------------
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17 | Purpose : This Modul defines the functions for processing
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18 | of incomming primitives for the component
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19 | L2R of the base station
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20 +-----------------------------------------------------------------------------
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21 */
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22
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23 #ifndef L2R_DNP_C
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24 #define L2R_DNP_C
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25 #endif
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26
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27 #define ENTITY_L2R
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28
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29 /*==== INCLUDES ===================================================*/
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30
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31 #include <string.h>
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32 #include "typedefs.h"
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33 #include "pconst.cdg"
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34 #include "vsi.h"
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35 #include "macdef.h"
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36 #include "custom.h"
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37 #include "gsm.h"
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38 #include "cus_l2r.h"
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39 #include "cnf_l2r.h"
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40 #include "mon_l2r.h"
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41 #include "prim.h"
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42 #include "pei.h"
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43 #include "tok.h"
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44 #include "dti.h" /* functionality of the dti library */
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45
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46 #include "cl_ribu.h"
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47 #include "l2r.h"
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48
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49 /*==== CONST =======================================================*/
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50
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51 /*==== TYPES =======================================================*/
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52
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53 /*==== VAR EXPORT ==================================================*/
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54
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55 /*==== VAR LOCAL ===================================================*/
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56
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57 /*==== FUNCTIONS ===================================================*/
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58
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59 /*
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60 +------------------------------------------------------------------------------
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61 | Function : sig_dti_dn_tx_buffer_full_ind
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62 +------------------------------------------------------------------------------
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63 | Description : Process signal DTI_REASON_TX_BUFFER_FULL received from
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64 | dti library callback function.
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65 |
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66 | Parameters : -
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67 |
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68 | Return : -
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69 +------------------------------------------------------------------------------
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70 The buffer function of DTILIB is not used.
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71 So there is nothing to be done here yet..
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72 */
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73 GLOBAL void sig_dti_dn_tx_buffer_full_ind()
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74 {
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75 TRACE_FUNCTION ("sig_dti_dn_tx_buffer_full_ind()");
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76 }
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77
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78
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79 /*
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80 +------------------------------------------------------------------------------
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81 | Function : sig_dti_dn_tx_buffer_ready_ind
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82 +------------------------------------------------------------------------------
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83 | Description : Process signal DTI_REASON_TX_BUFFER_READY received from
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84 | dti library callback function.
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85 |
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86 | Parameters : -
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87 |
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88 | Return : -
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89 +------------------------------------------------------------------------------
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90 */
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91 GLOBAL void sig_dti_dn_tx_buffer_ready_ind()
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92 {
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93 T_DN *ddn = &l2r_data->dn;
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94
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95 TRACE_FUNCTION ("sig_dti_dn_tx_buffer_ready_ind()");
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96
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97 if(ddn->Brk_dti_data_ind NEQ NULL)
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98 {
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99 /*
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100 * if there is a pending break indication to be sent via dti,
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101 * send it now and go waiting for the next flow control primitive
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102 */
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103 SET_STATE (DN_UL, IW_WAIT);
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104 sig_mgt_dn_send_break_req();
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105 return;
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106 }
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107
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108 switch (GET_STATE (DN))
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109 {
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110 case DN_CONNECTED:
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111 if (!ddn->DtiConnected) /*jk: data send only when DTI connected*/
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112 break;
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113
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114 if ((ddn->RiBu.idx.filled AND ddn->ULFlow EQ FL_INACTIVE) OR ddn->ReportMrgFlow)
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115 {
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116 dn_send_data_ind(); /* primitive is in ring buffer or flow state must be reported*/
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117 }
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118 else
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119 {
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120 SET_STATE (DN_UL, IW_WAIT); /* no primitive is ready */
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121 }
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122
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123 dn_cond_free_prims();
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124 dn_check_flow();
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125
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126 switch (GET_STATE (DN_LL))
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127 {
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128 case IW_IDLE:
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129 dn_cond_req_data();
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130 break;
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131 }
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132 break;
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133 }
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134 }
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135
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136 GLOBAL void dn_rlp_data_ind(T_RLP_DATA_IND *rlp_data_ind)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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137 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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138 T_DN *ddn = &l2r_data->dn;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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139
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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140 T_PRIM_INDEX frames;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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141 T_PRIM_INDEX emptyfr;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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142 T_PRIM_INDEX r_index;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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143 BOOL break_found;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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144 T_BIT sa;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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145 T_BIT sb;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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146 T_FLOW flow_brk;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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147 T_FLOW flow_gen;
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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148
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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149 TRACE_FUNCTION ("dn_rlp_data_ind()");
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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150 PACCESS (rlp_data_ind);
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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151
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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152 switch (GET_STATE (DN))
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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153 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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154 case DN_CONNECTED:
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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155 case DN_WAIT_FIRST_DATA:
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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156 dn_scan_break_req
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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157 (
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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158 rlp_data_ind,
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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159 &break_found,
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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160 &r_index,
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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161 &frames,
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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162 &emptyfr,
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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163 &sa,
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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164 &sb,
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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165 &flow_brk,
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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166 &flow_gen
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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167 );
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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168
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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169 if (break_found EQ FALSE)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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170 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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171 if (frames > 0)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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172 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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173 if (GET_STATE (DN) EQ DN_WAIT_FIRST_DATA AND sb EQ 0)
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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174 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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175 sig_dn_mgt_first_data_ind();
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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176 SET_STATE (DN, DN_CONNECTED);
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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177 }
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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178 dn_store_status(flow_gen); /* stores flow ctrl state only */
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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179 dn_store_prim(rlp_data_ind, 0); /* L2R-ENH-7527 quick fix */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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180 }
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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181 else
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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182 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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183 dn_cond_report_status();
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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184 PFREE (rlp_data_ind);
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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185 }
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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186 }
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 else /* break found */
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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188 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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189 dn_free_all_prims();
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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190 dn_init_ribu();
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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191 dn_check_flow();
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193 if (r_index EQ frames)
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194 {
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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195 dn_store_status(flow_brk);
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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196 PFREE (rlp_data_ind);
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 }
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198 else
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 {
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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200 dn_store_status(flow_gen);
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201 dn_store_prim(rlp_data_ind, r_index);
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 }
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203 sig_dn_mgt_break_ind(sa, sb, ddn->MrgFlow);
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 ddn->LastState = sa << SO_SA_BIT | sb << SO_SB_BIT;
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205 }
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 dn_cond_req_data();
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 break;
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208 }
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 }
fa8dc04885d8 src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210