annotate src/cs/drivers/drv_core/spi/spi_drv.h @ 84:7160f0d005d2

first stage of actual FreeCalypso backlight rework
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 26 Oct 2020 23:46:55 +0000
parents 4e78acac3d88
children
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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1 /**********************************************************************************/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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2 /* TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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3 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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4 /* Property of Texas Instruments -- For Unrestricted Internal Use Only */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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5 /* Unauthorized reproduction and/or distribution is strictly prohibited. This */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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6 /* product is protected under copyright law and trade secret law as an */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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7 /* unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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8 /* rights reserved. */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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9 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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10 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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11 /* Filename : spi_drv.h */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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12 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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13 /* Description : SPI registers and bits definitions. */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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14 /* Functions and macros to drive the SPI module. */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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15 /* The Serial Port Interface is a bidirectional 3 lines */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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16 /* interface dedicated to the transfer of data to and */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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17 /* from up to 5 external devices offering a 3 lines */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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18 /* serial interface. */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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19 /* In this project, it is only used to connect the TI */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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20 /* Analog BaseBand (ABB). */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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21 /* It is assumed that the ABB is connected as the SPI */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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22 /* device 0. */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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23 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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24 /* This interface is specified to be compatible with */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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25 /* the UMA1018M Philips, the FUJITSU MB15F02, the */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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26 /* SIEMENS PMB2306T synthesizers and the TI ABB. */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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27 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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28 /* This serial port is based on a looped shift-register */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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29 /* thus allowing both transmit (PISO) and receive (SIPO) */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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30 /* modes. */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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31 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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32 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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33 /* Author : Pascal PUEL */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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34 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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35 /* Version number : 1.28 */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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36 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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37 /* Date and time : 07/01/03 */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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38 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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39 /* Previous delta : Rework */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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40 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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41 /**********************************************************************************/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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42
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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43 #ifndef __SPI_DRV_H__
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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44 #define __SPI_DRV_H__
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45
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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46 #include "l1sw.cfg"
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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47 #include "chipset.cfg"
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48
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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49 #include "memif/mem.h"
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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50 #if (OP_L1_STANDALONE == 0)
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51 #include "main/sys_types.h"
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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52 #else
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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53 #include "sys_types.h"
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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54 #endif
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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55
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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56 // SPI module registers definition
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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57 #define SPI_REG_SET1 (MEM_SPI + 0x00)
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58 #define SPI_REG_SET2 (MEM_SPI + 0x02)
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59 #define SPI_REG_CTRL (MEM_SPI + 0x04)
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60 #define SPI_REG_STATUS (MEM_SPI + 0x06)
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61 #define SPI_REG_TX_LSB (MEM_SPI + 0x08)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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62 #define SPI_REG_TX_MSB (MEM_SPI + 0x0A)
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63 #define SPI_REG_RX_LSB (MEM_SPI + 0x0C)
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64 #define SPI_REG_RX_MSB (MEM_SPI + 0x0E)
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65
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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66
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67 // SPI module bits definition of register SPI_REG_SET1
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68 #define SPI_CLK_OFF 0x0000 // default value
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69 #define SPI_CLK_ON 0x0001
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70 #define SPI_CLOCK_DIV_1 0x0000 // default value
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71 #define SPI_CLOCK_DIV_2 0x0002
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72 #define SPI_CLOCK_DIV_4 0x0004
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73 #define SPI_CLOCK_DIV_8 0x0006
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74 #define SPI_CLOCK_DIV_16 0x0008
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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75 #if (CHIPSET == 12)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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76 #define SPI_CLOCK_DIV_32 0x000A
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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77 #define SPI_CLOCK_DIV_64 0x000C
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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78 #define SPI_CLOCK_DIV_128 0x000E
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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79 #endif
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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80 #define SPI_IT_MASK_0 0x0010 // default value
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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81 #define SPI_IT_DEMASK_0 0x0000
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82 #define SPI_IT_MASK_1 0x0020 // default value
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83 #define SPI_IT_DEMASK_1 0x0000
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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84
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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85
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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86 // SPI module bits definition of register SPI_REG_SET2
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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87 #define SPI_CLK_EDG_FALL 0x0000 // default value for device 0
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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88 #define SPI_CLK_EDG_RISE 0x0001
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89 #define SPI_CLK_EDG_FALL_1 0x0000 // default value for device 1
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90 #define SPI_CLK_EDG_RISE_1 0x0002
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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91 #define SPI_CLK_EDG_FALL_2 0x0000 // default value for device 2
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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92 #define SPI_CLK_EDG_RISE_2 0x0004
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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93 #define SPI_CLK_EDG_FALL_3 0x0000 // default value for device 3
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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94 #define SPI_CLK_EDG_RISE_3 0x0008
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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95 #define SPI_CLK_EDG_FALL_4 0x0000 // default value for device 4
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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96 #define SPI_CLK_EDG_RISE_4 0x0010
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97 #define SPI_NTSPEN_NEG_LEV 0x0000 // default value for device 0
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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98 #define SPI_NTSPEN_POS_LEV 0x0020
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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99 #define SPI_NTSPEN_NEG_LEV_1 0x0000 // default value for device 1
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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100 #define SPI_NTSPEN_POS_LEV_1 0x0040
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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101 #define SPI_NTSPEN_NEG_LEV_2 0x0000 // default value for device 2
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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102 #define SPI_NTSPEN_POS_LEV_2 0x0080
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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103 #define SPI_NTSPEN_NEG_LEV_3 0x0000 // default value for device 3
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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104 #define SPI_NTSPEN_POS_LEV_3 0x0100
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105 #define SPI_NTSPEN_NEG_LEV_4 0x0000 // default value for device 4
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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106 #define SPI_NTSPEN_POS_LEV_4 0x0200
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107 #define SPI_NTSPEN_LEV_TRIG 0x0000 // default value for device 0
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Mychaela Falconia <falcon@freecalypso.org>
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108 #define SPI_NTSPEN_EDG_TRIG 0x0400
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109 #define SPI_NTSPEN_LEV_TRIG_1 0x0000 // default value for device 1
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Mychaela Falconia <falcon@freecalypso.org>
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110 #define SPI_NTSPEN_EDG_TRIG_1 0x0800
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111 #define SPI_NTSPEN_LEV_TRIG_2 0x0000 // default value for device 2
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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112 #define SPI_NTSPEN_EDG_TRIG_2 0x1000
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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113 #define SPI_NTSPEN_LEV_TRIG_3 0x0000 // default value for device 3
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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diff changeset
114 #define SPI_NTSPEN_EDG_TRIG_3 0x2000
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
115 #define SPI_NTSPEN_LEV_TRIG_4 0x0000 // default value for device 4
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
116 #define SPI_NTSPEN_EDG_TRIG_4 0x4000
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
117
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
118
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
119 // SPI module bits definition of register SPI_REG_CTRL
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
120 #define SPI_RDWR_DEACTIV 0x0000 // default value
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
121 #define SPI_RDWR_ACTIV 0x0001
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
122 #define SPI_WR_DEACTIV 0x0000 // default value
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
123 #define SPI_WR_ACTIV 0x0002
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
124 #define SPI_WNB_0 0x0000 // default value
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
125 #define SPI_WNB_1 0x0004
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
126 #define SPI_WNB_2 0x0008
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
127 #define SPI_WNB_3 0x000c
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
128 #define SPI_WNB_4 0x0010
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
129 #define SPI_WNB_5 0x0014
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
130 #define SPI_WNB_6 0x0018
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
131 #define SPI_WNB_7 0x001c
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
132 #define SPI_WNB_8 0x0020
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
133 #define SPI_WNB_9 0x0024
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
134 #define SPI_WNB_10 0x0028
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
135 #define SPI_WNB_11 0x002c
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
136 #define SPI_WNB_12 0x0030
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
137 #define SPI_WNB_13 0x0034
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
138 #define SPI_WNB_14 0x0038
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
139 #define SPI_WNB_15 0x003c
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
140 #define SPI_WNB_16 0x0040
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
141 #define SPI_WNB_17 0x0044
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
142 #define SPI_WNB_18 0x0048
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
143 #define SPI_WNB_19 0x004c
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
144 #define SPI_WNB_20 0x0050
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
145 #define SPI_WNB_21 0x0054
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
146 #define SPI_WNB_22 0x0058
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
147 #define SPI_WNB_23 0x005c
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
148 #define SPI_WNB_24 0x0060
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
149 #define SPI_WNB_25 0x0064
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
150 #define SPI_WNB_26 0x0068
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
151 #define SPI_WNB_27 0x006c
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
152 #define SPI_WNB_28 0x0070
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
153 #define SPI_WNB_29 0x0074
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
154 #define SPI_WNB_30 0x0078
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
155 #define SPI_WNB_31 0x007c
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
156
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
157
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
158 // SPI possible device IDs
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
159 #define SPI_DEV0 0x0000
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
160 #define SPI_DEV1 0x0080
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
161 #define SPI_DEV2 0x0100
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
162 #define SPI_DEV3 0x0180
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
163 #define SPI_DEV4 0x0200
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
164
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
165 // ABB should be mapped as device 0
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
166 #define ABB SPI_DEV0
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
167
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
168
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
169 // SPI module bits definition of register SPI_REG_STATUS
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
170 #define RE_ST 0x0001 // bit 0
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
171 #define WE_ST 0x0002 // bit 1
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
172
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
173
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
174 /* The ARM emulator requires the spi clock always ON to be able to access */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
175 /* spi registers through a window.*/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
176 /* But it's better to stop the SPI clock in the GSM application to reduce the power consumption. */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
177 /* Validate the next line to reduce power consumption */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
178 //#define SPI_CLK_LOW_POWER
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
179
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
180
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
181
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
182 // STRUCTURES
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
183 typedef struct
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
184 {
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
185 SYS_UWORD16 PrescVal;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
186 SYS_UWORD16 DataTrLength;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
187 SYS_UWORD16 DevAddLength;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
188 SYS_UWORD16 DevId;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
189 SYS_UWORD16 ClkEdge;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
190 SYS_UWORD16 TspEnLevel;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
191 SYS_UWORD16 TspEnForm;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
192 }T_SPI_DEV; // T_SPI_DEV is used to define an SPI device
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
193
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
194
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
195 // MACROS
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
196 #define SPI_WRITE_TX_LSB(TxLsb) { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
197 * (volatile SYS_UWORD16 *) SPI_REG_TX_LSB = TxLsb; }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
198
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
199 #define SPI_WRITE_TX_MSB(TxMsb) { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
200 * (volatile SYS_UWORD16 *) SPI_REG_TX_MSB = TxMsb; }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
201
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
202 #define SPI_START_WRITE {* (volatile SYS_UWORD16 *) SPI_REG_CTRL |= SPI_WR_ACTIV; }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
203
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
204 #define SPI_START_READ {* (volatile SYS_UWORD16 *) SPI_REG_CTRL |= SPI_RDWR_ACTIV; }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
205
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
206 #define SPI_CLK_DISABLE { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
207 * (volatile SYS_UWORD16 *) SPI_REG_SET1 &= ~SPI_CLK_ON; }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
208
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
209 #define SPI_CLK_ENABLE { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
210 * (volatile SYS_UWORD16 *) SPI_REG_SET1 |= SPI_CLK_ON; }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
211
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
212 #define SPI_MaskIT_WR { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
213 * (volatile SYS_UWORD16 *) SPI_REG_SET1 |= SPI_IT_MASK_0; }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
214
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
215 #define SPI_MaskIT_RD { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
216 * (volatile SYS_UWORD16 *) SPI_REG_SET1 |= SPI_IT_MASK_1; }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
217
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
218 #define SPI_Mask_All_IT { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
219 * (volatile SYS_UWORD16 *) SPI_REG_SET1 |= (SPI_IT_MASK_0 | SPI_IT_MASK_1); }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
220
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
221 #define SPI_UnmaskIT_WR { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
222 * (volatile SYS_UWORD16 *) SPI_REG_SET1 &= ~SPI_IT_MASK_0; }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
223
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
224 #define SPI_UnmaskIT_RD { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
225 * (volatile SYS_UWORD16 *) SPI_REG_SET1 &= ~SPI_IT_MASK_1; }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
226
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
227 #define SPI_Unmask_All_IT { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
228 * (volatile SYS_UWORD16 *) SPI_REG_SET1 &= ~(SPI_IT_MASK_0 | SPI_IT_MASK_1); }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
229
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
230 #define SPI_Ready_for_WR { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff changeset
231 * (volatile SYS_UWORD16 *) SPI_REG_SET1 |= (SPI_CLK_ON | SPI_IT_MASK_0); }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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232
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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233 #define SPI_Ready_for_RD { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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234 * (volatile SYS_UWORD16 *) SPI_REG_SET1 |= (SPI_CLK_ON | SPI_IT_MASK_1); }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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235
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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236 #define SPI_Ready_for_RDWR { \
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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237 * (volatile SYS_UWORD16 *) SPI_REG_SET1 |= (SPI_CLK_ON | SPI_IT_MASK_0 | SPI_IT_MASK_1); }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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238
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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239
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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240
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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241 // INLINE FUNCTIONS
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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242 /*-----------------------------------------------------------------------*/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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243 /* SPI_ReadRX_LSB() */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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244 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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245 /* This function returns the value of SPI_REG_RX_LSB register */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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246 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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247 /*-----------------------------------------------------------------------*/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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248 static inline SYS_UWORD16 SPI_ReadRX_LSB(void)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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249 {
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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250 return * (volatile SYS_UWORD16 *) SPI_REG_RX_LSB;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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251 }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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252
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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253
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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254 /*-----------------------------------------------------------------------*/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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255 /* SPI_ReadRX_MSB() */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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256 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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257 /* This function returns the value of SPI_REG_RX_MSB register */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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258 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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259 /*-----------------------------------------------------------------------*/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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260 static inline SYS_UWORD16 SPI_ReadRX_MSB(void)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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261 {
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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262 return * (volatile SYS_UWORD16 *) SPI_REG_RX_MSB;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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263 }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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264
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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265
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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266
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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267 /*-----------------------------------------------------------------------*/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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268 /* SPI_ReadStatus() */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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269 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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270 /* This function returns the value of SPI_REG_STATUS register */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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271 /* */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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272 /*-----------------------------------------------------------------------*/
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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273 static inline SYS_UWORD16 SPI_ReadStatus(void)
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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274 {
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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275 return * (volatile SYS_UWORD16 *) SPI_REG_STATUS;
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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276 }
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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277
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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278
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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279
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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280 // PROTOTYPES
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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281 void SPI_InitDev(T_SPI_DEV *Device);
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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282
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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283 #endif // __SPI_DRV_H__