FreeCalypso > hg > fc-tourmaline
annotate src/cs/layer1/dl1/dl1_com.c @ 223:740a8e8fc9d7
startup sync logic rework for the new PWON button boot scheme
Previously we added logic to the MMI task to hold off PEI init until
R2D is running, and then extended that condition to wait for FCHG
init too. However, the dependencies of MMI upon R2D and FCHG don't
start until mmiInit(), and that call is driven by Switch_ON() code,
hence the wait for R2D and FCHG init can be made in that code path
instead of the MMI task. Furthermore, with our new way of signaling
PWON button boot to MMI, we need a new wait to ensure that the MMI
task is up - previously this assurance was provided by the wait for
Kp pointers to be set.
Solution: revert our previous PEI init hold-off additions to MMI,
add a new flag indicating MMI task init done, and put the combined
wait for all needed conditions into our new PWON button boot code
in power.c.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Tue, 27 Apr 2021 06:24:52 +0000 |
parents | 4e78acac3d88 |
children |
rev | line source |
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0
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src/{condat,cs,gpf,nucleus}: import from Selenite
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parents:
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1 /* |
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2 * This module contains the LISR and HISR glue functions for L1 |
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src/{condat,cs,gpf,nucleus}: import from Selenite
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3 * which used to be in the dl1_com module in the Leonardo version. |
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4 * The LoCosto source from which we got our L1 code no longer has a |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
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parents:
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5 * dl1_com.c module, and the ISR glue functions in question have been |
4e78acac3d88
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parents:
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6 * moved into csw-system/init_common/init.c - an incredibly messy C |
4e78acac3d88
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7 * module that is mostly devoted to LoCosto BSP initialization. |
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8 * |
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9 * The present C code has been extracted from LoCosto's init.c, |
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10 * guided by the disassembly of dl1_com.obj from the Leonardo version. |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
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11 */ |
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12 |
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13 /* Include Files */ |
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14 #include <assert.h> |
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15 #include <stdarg.h> |
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16 #include <stdio.h> |
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17 #include <stdlib.h> |
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18 #include <string.h> |
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19 |
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20 #include "nucleus.h" |
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21 |
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22 #include "l1_types.h" |
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23 #include "l1_confg.h" |
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24 #include "l1_const.h" |
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25 |
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26 #if TESTMODE |
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27 #include "l1tm_defty.h" |
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28 #endif // TESTMODE |
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29 |
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30 #if (AUDIO_TASK == 1) |
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31 #include "l1audio_const.h" |
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32 #include "l1audio_cust.h" |
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33 #include "l1audio_defty.h" |
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34 #endif // AUDIO_TASK |
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35 |
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36 #if (L1_GTT == 1) |
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37 #include "l1gtt_const.h" |
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38 #include "l1gtt_defty.h" |
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39 #endif |
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40 |
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41 #if (L1_MP3 == 1) |
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42 #include "l1mp3_defty.h" |
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43 #endif |
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44 |
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45 #if (L1_MIDI == 1) |
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46 #include "l1midi_defty.h" |
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47 #endif |
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48 |
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49 #if (L1_AAC == 1) |
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50 #include "l1aac_defty.h" |
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51 #endif |
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52 #if (L1_DYN_DSP_DWNLD == 1) |
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53 #include "l1_dyn_dwl_defty.h" |
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54 #endif |
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55 |
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56 #if (TRACE_TYPE == 4) |
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57 #include "l1_defty.h" |
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58 #endif |
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59 |
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60 #include "armio.h" |
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61 #include "timer.h" |
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62 |
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63 #include "iq.h" |
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64 #include "mem.h" |
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65 #include "clkm.h" |
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66 #include "inth.h" |
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67 |
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68 /* |
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69 * Timing monitor |
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70 */ |
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71 #if (TRACE_TYPE == 4) |
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72 extern T_L1A_L1S_COM l1a_l1s_com; |
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73 extern T_L1S_GLOBAL l1s; |
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74 UNSIGNED max_cpu, fn_max_cpu; |
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75 unsigned short layer_1_sync_end_time; |
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76 unsigned short max_cpu_flag; |
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77 #if (DSP >= 38) |
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78 // DSP CPU load measurement trace variables |
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79 UWORD32 dsp_max_cpu_load_trace_array[4]; |
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80 UWORD32 dsp_max_cpu_load_idle_frame; |
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81 unsigned short l1_dsp_cpu_load_trace_flag; |
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82 #endif |
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83 #endif |
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84 |
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85 #if (L1_EXT_AUDIO_MGT == 1) |
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86 NU_HISR EXT_AUDIO_MGT_hisr; |
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87 char FAR ext_audio_mgt_hisr_stack[500]; |
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88 extern void Cust_ext_audio_mgt_hisr(void); |
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89 #endif |
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90 |
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91 #if ( (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1) ) // equivalent to an API_HISR flag |
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92 extern void api_hisr(void); |
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93 #ifdef __GNUC__ |
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94 #define SECTION_ATTR __attribute__ ((section (".API_HISR_stack"))) |
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95 #else |
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96 #define SECTION_ATTR |
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97 #pragma DATA_SECTION (API_HISR_stack,"API_HISR_stack"); |
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98 #endif |
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99 char FAR API_HISR_stack[0x400] SECTION_ATTR; |
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100 #undef SECTION_ATTR |
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101 NU_HISR apiHISR; |
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102 #endif // (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_DYN_DSP_DWNLD == 1) |
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103 |
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104 #if (FF_L1_IT_DSP_USF == 1) || (FF_L1_IT_DSP_DTX == 1) |
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parents:
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105 char FAR API_MODEM_HISR_stack[0x400]; // stack size to be tuned |
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parents:
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106 NU_HISR api_modemHISR; |
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107 #endif // FF_L1_IT_DSP_USF |
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108 |
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109 /* |
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110 * HISR stack and semaphore needed by L1 |
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parents:
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111 */ |
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112 #if (OP_L1_STANDALONE == 0) |
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113 #define LAYER_1_SYNC_STACK_SIZE 4000 /* matching Leonardo version */ |
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114 unsigned char layer_1_sync_stack[LAYER_1_SYNC_STACK_SIZE]; |
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115 #else |
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116 #if TESTMODE |
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117 char FAR layer_1_sync_stack[2600 /*3600*/]; // Frame interrupt task stack for EVA3 |
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118 #else |
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119 char FAR layer_1_sync_stack[1600 /* 2600 */]; // Frame interrupt task stack for EVA3 |
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120 #endif |
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121 #endif /* OP_L1_STANDALONE */ |
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122 |
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123 NU_HISR layer_1_sync_HISR; // Frame interrupt task stack for EVA3 |
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124 |
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125 /* forward declaration */ |
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126 void layer_1_sync_HISR_entry (void); |
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127 |
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128 /* |
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129 * l1_create_ISR |
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130 * |
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131 * Create L1 HISR. This function is called from l1_pei. |
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132 */ |
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133 void l1_create_ISR (void) |
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134 { |
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Mychaela Falconia <falcon@freecalypso.org>
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135 STATUS status; |
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136 |
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137 #if (OP_L1_STANDALONE == 0) |
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138 // Fill the entire stack with the pattern 0xFE |
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Mychaela Falconia <falcon@freecalypso.org>
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139 memset (layer_1_sync_stack, 0xFE, LAYER_1_SYNC_STACK_SIZE); |
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140 #endif |
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141 |
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142 status = NU_Create_HISR (&layer_1_sync_HISR, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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143 "L1_HISR", |
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Mychaela Falconia <falcon@freecalypso.org>
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144 layer_1_sync_HISR_entry, |
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Mychaela Falconia <falcon@freecalypso.org>
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145 #if (OP_L1_STANDALONE == 0) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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146 0, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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147 layer_1_sync_stack, |
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Mychaela Falconia <falcon@freecalypso.org>
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148 LAYER_1_SYNC_STACK_SIZE); |
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Mychaela Falconia <falcon@freecalypso.org>
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149 #else |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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150 0, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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151 layer_1_sync_stack, |
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Mychaela Falconia <falcon@freecalypso.org>
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152 sizeof(layer_1_sync_stack)); |
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Mychaela Falconia <falcon@freecalypso.org>
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153 #endif |
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154 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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155 #if (L1_EXT_AUDIO_MGT) |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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156 // Create HISR for Ext MIDI activity |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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157 //================================== |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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158 status += NU_Create_HISR(&EXT_AUDIO_MGT_hisr, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
159 "H_EXT_AUDIO_MGT", |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
160 Cust_ext_audio_mgt_hisr, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
161 1, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
162 ext_audio_mgt_hisr_stack, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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163 sizeof(ext_audio_mgt_hisr_stack)); |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
164 #endif |
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165 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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166 #if ( (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1) ) // equivalent to an API_HISR flag |
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167 status += NU_Create_HISR(&apiHISR, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
168 "API_HISR", |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
169 api_hisr, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
170 1, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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|
171 API_HISR_stack, |
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Mychaela Falconia <falcon@freecalypso.org>
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172 sizeof(API_HISR_stack)); |
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Mychaela Falconia <falcon@freecalypso.org>
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173 #endif // (L1_MP3 == 1) || (L1_MIDI == 1) || (L1_AAC == 1) || (L1_DYN_DSP_DWNLD == 1) |
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174 |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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175 #if (FF_L1_IT_DSP_USF == 1) || (FF_L1_IT_DSP_DTX == 1) // equivalent to an API_MODEM_HISR flag |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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176 // Create HISR for USF DSP interrupt !!!!. This HISR needs |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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177 // to have the highest priority since the USF status needs |
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178 // to be known before the next block starts. |
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179 //======================================================== |
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Mychaela Falconia <falcon@freecalypso.org>
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180 status += NU_Create_HISR(&api_modemHISR, |
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Mychaela Falconia <falcon@freecalypso.org>
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181 "MODEM", |
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Mychaela Falconia <falcon@freecalypso.org>
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182 api_modem_hisr, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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183 0, |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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184 API_MODEM_HISR_stack, |
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Mychaela Falconia <falcon@freecalypso.org>
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185 sizeof(API_MODEM_HISR_stack)); |
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Mychaela Falconia <falcon@freecalypso.org>
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186 #endif |
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187 |
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188 assert (status == 0); |
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Mychaela Falconia <falcon@freecalypso.org>
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189 } |
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Mychaela Falconia <falcon@freecalypso.org>
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190 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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191 /* |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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192 * The versions of TP_FrameIntHandler() and layer_1_sync_HISR_entry() |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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193 * in the TCS211 dl1_com.obj module contain CPU load measurement |
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Mychaela Falconia <falcon@freecalypso.org>
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194 * code. TI changed things for LoCosto, so we have to revert their |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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195 * changes and restore the TCS211 way. |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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196 */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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197 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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198 #if (TRACE_TYPE == 4) |
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199 #define TIMER_RESET_VALUE (0xFFFF) |
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Mychaela Falconia <falcon@freecalypso.org>
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200 #define TICKS_PER_TDMA (1875) |
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201 #endif |
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Mychaela Falconia <falcon@freecalypso.org>
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202 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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203 /*-------------------------------------------------------*/ |
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Mychaela Falconia <falcon@freecalypso.org>
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204 /* TP_FrameIntHandler() Low Interrupt service routine */ |
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Mychaela Falconia <falcon@freecalypso.org>
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205 /*-------------------------------------------------------*/ |
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Mychaela Falconia <falcon@freecalypso.org>
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206 /* Parameters : */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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207 /* Return : */ |
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Mychaela Falconia <falcon@freecalypso.org>
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208 /* Functionality : activate Hisr on each frame interrupt*/ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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209 /*-------------------------------------------------------*/ |
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210 void TP_FrameIntHandler(void) |
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211 { |
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212 |
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213 #if (OP_L1_STANDALONE == 1) |
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214 |
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215 #if (TRACE_TYPE==1) |
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216 if (trace_info.current_config->l1_dyn_trace & 1<<L1_DYN_TRACE_L1S_CPU_LOAD) |
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217 { |
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218 TM_ResetTimer (2, 0xFFFF, 1, 0); |
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219 TM_StartTimer (2); |
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220 } |
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221 #endif |
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222 |
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223 #if (TRACE_TYPE==6) |
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224 TM_ResetTimer (2, 0xFFFF, 1, 0); |
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225 TM_StartTimer (2); |
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226 #endif |
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227 |
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228 #if (TRACE_TYPE==7) /* CPU_LOAD */ |
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229 l1_cpu_load_start(); |
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230 #endif |
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231 |
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232 #else |
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233 |
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234 #if (TRACE_TYPE == 4) && (TI_NUC_MONITOR != 1) |
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235 TM_ResetTimer (2, TIMER_RESET_VALUE, 1, 0); |
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236 TM_StartTimer (2); |
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237 #endif |
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238 |
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239 #if (TI_NUC_MONITOR == 1) |
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240 /* Copy LISR buffer in Log buffer each end of HISR */ |
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241 ti_nuc_monitor_tdma_action(); |
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242 #endif |
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243 |
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244 #if WCP_PROF == 1 |
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245 prf_LogFNSwitch(l1s.actual_time.fn_mod42432); |
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246 #endif |
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247 |
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248 #endif /* OP_L1_STANDALONE */ |
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249 |
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250 NU_Activate_HISR(&layer_1_sync_HISR); /* Activate HISR interrupt */ |
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251 |
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252 #if (OP_L1_STANDALONE == 0) |
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253 #if (WCP_PROF == 1) |
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254 #if (PRF_CALIBRATION == 1) |
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255 NU_Activate_HISR(&prf_CalibrationHISR); |
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256 #endif |
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257 #endif |
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258 #endif |
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259 |
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260 } |
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261 |
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262 /* |
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263 * layer_1_sync_HISR_entry |
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264 * |
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265 * HISR associated to layer 1 sync. |
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266 */ |
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267 |
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268 void layer_1_sync_HISR_entry (void) |
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269 { |
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270 /* automatic var for the CPU load measurement code below */ |
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271 #if (TRACE_TYPE == 4) |
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272 unsigned long cpu; |
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273 #endif |
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274 |
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275 // Call Synchronous Layer1 |
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276 hisr(); |
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277 |
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278 /* |
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279 * FreeCalypso: the following code has been reconstructed from |
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280 * the disassembly of the TCS211 binary object; it was found to be |
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parents:
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281 * similar to the Trace_L1S_CPU_load() function in l1_trace.c |
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282 * which appears to have been only for (TRACE_TYPE == 1) originally. |
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283 */ |
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Mychaela Falconia <falcon@freecalypso.org>
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284 #if (TRACE_TYPE == 4) |
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Mychaela Falconia <falcon@freecalypso.org>
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285 layer_1_sync_end_time = TIMER_RESET_VALUE - TM_ReadTimer(2); |
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|
286 |
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Mychaela Falconia <falcon@freecalypso.org>
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287 cpu = (100 * layer_1_sync_end_time) / TICKS_PER_TDMA; |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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288 if (cpu > max_cpu) |
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289 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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290 max_cpu=cpu; |
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291 fn_max_cpu=l1s.actual_time.fn; |
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292 max_cpu_flag = 1; |
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293 /* |
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294 * TCS211 object has this bogus code here: |
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295 |
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296 if (some non-understood condition) { |
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297 static int i; |
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298 i++; // static var never used anywhere |
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299 max_cpu_flag = 1; |
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300 } |
4e78acac3d88
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301 |
4e78acac3d88
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302 * Because this bogus code does not change the result, |
4e78acac3d88
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303 * I decided not to bother with reconstructing it. |
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Mychaela Falconia <falcon@freecalypso.org>
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304 */ |
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|
305 } |
4e78acac3d88
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|
306 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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307 if (((l1s.actual_time.fn%1326) == 0) && (max_cpu_flag == 0)) |
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308 max_cpu = 0; |
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309 #endif |
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310 } |
4e78acac3d88
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311 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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312 /* the following stub functions live in the dl1_com module per TCS211 */ |
4e78acac3d88
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313 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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314 void rx_tch_data (API *data_address, |
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Mychaela Falconia <falcon@freecalypso.org>
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315 UWORD8 channel_mode, |
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Mychaela Falconia <falcon@freecalypso.org>
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|
316 UWORD8 blk_seq_number) |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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|
317 { |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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|
318 } |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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319 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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320 UWORD8 *tx_tch_data (void) |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
321 { |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
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322 return(NULL); |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
323 } |