FreeCalypso > hg > fc-tourmaline
annotate src/cs/system/template/gsm_ds_pirelli_ram.template @ 75:8697f358f505
backlight rework: Condat light driver accepts levels
The present change is another intermediate step on the path toward
new FreeCalypso backlight handling. At this intermediate step the
Condat light driver accepts 0-255 backlight levels driven by MFW,
and puts them out on PWL on Luna development boards. At the same
time on C139 it is now possible to turn on the display backlight
with or without the keypad bl - the lsb of the 0-255 backlight level
controls the keypad bl.
MFW presently drives only 0 and 255 backlight levels, thus there is
no visible behavioral change yet - but the plan for subsequent stages
of this backlight rework is to add a dimmed backlight state
(no keypad bl on C139) during active calls.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Sat, 24 Oct 2020 20:44:04 +0000 |
parents | 4e78acac3d88 |
children |
rev | line source |
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0
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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1 /* |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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2 * Integrated Protocol Stack Linker command file (all components) |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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3 * |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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4 * Target : ARM |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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5 * |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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6 * Copyright (c) Texas Instruments 2002, Condat 2002 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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7 * |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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8 * This version of the linker script template has been concocted |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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9 * by Spacefalcon the Outlaw based on previous hacks. |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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10 */ |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
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parents:
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11 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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12 -c /* Autoinitialize variables at runtime */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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13 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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14 /*********************************/ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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15 /* SPECIFY THE SYSTEM MEMORY MAP */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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16 /*********************************/ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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17 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
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18 MEMORY |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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19 { |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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20 /* using XRAM instead of flash */ |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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21 /* Interrupt Vectors Table */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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22 I_MEM (RXI) : org = 0x01000000 len = 0x00000100 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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23 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
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parents:
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24 /* Boot Sector */ |
4e78acac3d88
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25 B_MEM (RXI) : org = 0x01000100 len = 0x00001f00 |
4e78acac3d88
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parents:
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26 |
4e78acac3d88
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27 /* Magic Word for Calypso Boot ROM */ |
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28 MWC_MEM (RXI) : org = 0x01002000 len = 0x00000004 fill = 0x0000001 |
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29 |
4e78acac3d88
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30 /* Program Memory */ |
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Mychaela Falconia <falcon@freecalypso.org>
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31 P_MEM1 (RXI) : org = 0x01004000 len = 0x00000700 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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32 P_MEM2 (RXI) : org = 0x01004700 len = 0x00000004 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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33 P_MEM3 (RXI) : org = 0x01004704 len = 0x003fb8fc |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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34 |
4e78acac3d88
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35 /* FFS Area */ |
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36 FFS_MEM (RX) : org = 0x02000000 len = 0x00800000 |
4e78acac3d88
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parents:
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37 /**************************************************************************/ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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38 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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39 /* CS1: External SRAM 1 Mbytes ********************************************/ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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40 /* Data Memory */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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41 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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42 /* |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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43 * Huge XRAM on the Pirelli: present it as two banks of 4 MiB each |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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44 * ... or a little less since we just stole half of it for "flash" |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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45 */ |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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46 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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47 D_MEM1 (RW) : org = 0x01400000 len = 0x00380000 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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48 D_MEM2 (RW) : org = 0x01780000 len = 0x00080000 |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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49 /**************************************************************************/ |
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parents:
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50 |
4e78acac3d88
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51 /* CS6: Calypso Internal SRAM 512 kbytes **********************************/ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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52 /* Code & Variables Memory */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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53 S_MEM (RXW) : org = 0x00800100 len = 0x0007ff00 |
4e78acac3d88
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parents:
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54 /**************************************************************************/ |
4e78acac3d88
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parents:
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55 } |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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56 |
4e78acac3d88
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parents:
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57 /***********************************************/ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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58 /* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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59 /***********************************************/ |
4e78acac3d88
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parents:
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60 |
4e78acac3d88
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parents:
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61 /* |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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62 * Since the bootloader directly calls the INT_Initialize() routine located |
4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
Mychaela Falconia <falcon@freecalypso.org>
parents:
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63 * in int.s, this int.s code must always be mapped at the same address |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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64 * (usually in the second flash sector). Its length is about 0x500 bytes. |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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65 * Then comes the code that need to be loaded into the internal RAM. |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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66 */ |
4e78acac3d88
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67 |
4e78acac3d88
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68 SECTIONS |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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69 { |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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70 .intvecs : {} > I_MEM /* Interrupt Vectors Table */ |
4e78acac3d88
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71 .monitor : > B_MEM /* Monitor Constants & Code */ |
4e78acac3d88
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72 { |
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73 $(CONST_BOOT_LIB) |
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74 } |
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75 |
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76 .inttext : {} > P_MEM1 /* int.s Code */ |
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77 |
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78 .bss_dar : > D_MEM1 /* DAR SWE Variables */ |
4e78acac3d88
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79 { |
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80 $(BSS_DAR_LIB) |
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81 } |
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Mychaela Falconia <falcon@freecalypso.org>
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82 |
4e78acac3d88
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83 /* |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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84 * The .bss section should not be split to ensure it is initialized to 0 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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85 * each time the SW is reset. So the whole .bss is mapped either in D_MEM1 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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86 * or in D_MEM2. |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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87 * |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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88 * Falcon's note for K5A3281: see the comments above where the memory |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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89 * regions are defined. |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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90 */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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91 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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92 .bss : > D_MEM1 | D_MEM2 /* Global & Static Variables */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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93 { |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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94 $(BSS_BOOT_LIB) |
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parents:
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95 } |
4e78acac3d88
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96 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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97 /* |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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98 * All .bss sections, which must be mapped in internal RAM must be |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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99 * grouped in order to initialized the corresponding memory to 0. |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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100 * This initialization is done in int.s file before calling the Nucleus |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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101 * routine. |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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102 */ |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
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103 |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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104 GROUP |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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105 { |
4e78acac3d88
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Mychaela Falconia <falcon@freecalypso.org>
parents:
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106 S_D_Mem /* Label of start address of .bss section in Int. RAM */ |
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107 .DintMem |
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108 { |
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109 |
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110 /* |
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111 * .bss sections of the application |
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112 */ |
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113 |
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114 $(BSS_LIBS) |
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115 |
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116 } |
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117 |
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118 API_HISR_stack : {} |
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119 |
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120 E_D_Mem /* Label of end address of .bss section in Int. RAM */ |
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121 } > S_MEM |
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122 |
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123 /* |
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124 * .text and .const sections which must be mapped in internal RAM. |
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125 */ |
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126 |
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127 .ldfl : {} > P_MEM2 /* Used to know the start load address */ |
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128 GROUP load = P_MEM3, run = S_MEM |
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129 { |
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130 S_P_Mem /* Label of start address of .text & .const sections in Int. RAM */ |
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131 .PIntMem |
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132 { |
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133 /* |
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134 * .text and .const sections of the application. |
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135 * |
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136 * The .veneer sections correspond exactly to .text:v&n sections |
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137 * implementing the veneer functions. The .text:v$n -> .veneer |
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138 * translation is performed by PTOOL software when PTOOL_OPTIONS |
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139 * environement variable is set to veneer_section. |
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140 */ |
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141 |
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142 $(CONST_LIBS) |
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143 |
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144 } |
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145 E_P_Mem /* Label of end address of .text and .const sections in Int. RAM */ |
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146 } |
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147 |
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148 /* |
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149 * The rest of the code is mapped in flash, however the trampolines |
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150 * load address should be consistent with .text. |
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151 */ |
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152 COMMENT2START |
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153 `trampolines load = P_MEM3, run = S_MEM |
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154 COMMENT2END |
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155 |
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156 .text : {} > P_MEM3 /* Code */ |
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157 |
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158 /* |
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159 * The rest of the constants is mapped in flash. |
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160 * The .cinit section should not be split. |
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161 */ |
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162 |
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163 .cinit : {} > P_MEM3 /* Initialization Tables */ |
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164 .const : {} > P_MEM3 /* Constant Data */ |
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165 KadaAPI : {} > P_MEM3 /* ROMized CLDC */ |
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166 |
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167 .javastack: {} >> D_MEM1 | D_MEM2 /* Java stack */ |
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168 |
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169 .stackandheap : > D_MEM1 /* System Stacks, etc... */ |
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170 { |
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171 /* Leave 20 32bit words for register pushes. */ |
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172 . = align(8); |
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173 . += 20 * 4; |
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174 |
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175 /* Stack for abort and/or undefined modes. */ |
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176 exception_stack = .; |
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177 |
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178 /* Leave 38 32bit words for state saving on exceptions. */ |
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179 _xdump_buffer = .; |
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180 . += 38 * 4; |
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181 . = align(8); |
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182 |
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183 /* Beginning of stacks and heap area - 2.75 kbytes (int.s) */ |
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184 stack_segment = .; |
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185 . += 0xB00; |
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|
186 } |
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187 |
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188 .data : {} > D_MEM1 /* Initialized Data */ |
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189 .sysmem : {} > D_MEM1 /* Dynamic Memory Allocation Area */ |
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190 |
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191 } |