FreeCalypso > hg > fc-tourmaline
annotate scripts/cfg-template @ 244:96784b8974eb
Switch_ON(): detect charging mode by CHGPRES bit
Consider the following scenario: the phone is on, the user plugs in
the charger, and then executes the power-off operation. In the Iota
VRPC this sequence translates to a switch-off immediately followed
by another switch-on - but the CHGSTS bit doesn't get set on the second
switch-on cycle! Disassembly of Pirelli's fw shows that they check
the CHGPRES bit, and furthermore, if both CHGPRES and ONBSTS are set,
the code they pass to their modified Power_ON_Button() function is
the one for charging - so let's adopt the same CHGPRES check and
the same priority order for switch-on causes.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Mon, 03 May 2021 06:51:29 +0000 |
parents | b55b47f49638 |
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5
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1 [board.cfg] |
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2 |
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3 BOARD 41 |
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4 |
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5 [chipset.cfg] |
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6 |
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7 ANLG_FAM 2 |
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8 ANLG_PG 0 |
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9 CHIPSET var |
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10 |
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11 [debug.cfg] |
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12 |
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13 TI_NUC_MONITOR 0 |
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14 TI_PROFILER var |
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15 |
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16 [dio.cfg] |
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17 |
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18 DIOIL_CONFIG 0 |
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19 |
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20 [ffs.cfg] |
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21 |
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22 TARGET 1 |
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23 _RVF 1 |
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24 |
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25 [l1sw.cfg] |
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26 |
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27 AMR var |
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28 CUST 0 |
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29 DCO_ALGO 0 |
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30 IDS var |
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31 L1_12NEIGH 1 |
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32 L1_EOTD 0 |
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33 L1_EOTD_QBIT_ACC 0 |
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34 L1_GPRS var |
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35 L1_GTT 0 |
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36 L1_MIDI 0 |
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37 L1_VOICE_MEMO_AMR var |
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38 MELODY_E2 var |
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39 OP_L1_STANDALONE 0 |
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40 OP_RIV_AUDIO 1 |
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41 ORDER2_TX_TEMP_CAL 1 |
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42 RAZ_VULSWITCH_REGAUDIO 0 |
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43 SECURITY 0 |
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44 SPEECH_RECO var |
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45 TESTMODE 1 |
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46 TRACE_TYPE 4 |
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47 VCXO_ALGO 1 |
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48 |
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49 [r2d.cfg] |
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50 |
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51 R2D_ASM 0 |
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52 R2D_EMBEDDED_LCD var |
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53 R2D_LCD_TEST 0 |
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54 |
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55 [rf.cfg] |
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56 |
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57 RF var |
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58 RF_FAM var |
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59 RF_PA var |
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60 RF_PG var |
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61 |
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62 [rv.cfg] |
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63 |
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64 RVTOOL 0 |
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65 TEST 0 |
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66 _GSM 1 |
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67 |
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68 [swconfig.cfg] |
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69 |
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70 ALR 1 |
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71 BT 0 |
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72 DP 0 |
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73 DWNLD 1 |
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74 GSMLITE 0 |
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75 L1_DYN_DSP_DWNLD var |
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76 LONG_JUMP 3 |
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77 MOVE_IN_INTERNAL_RAM 1 |
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78 OP_WCP 0 |
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79 PMODE var |
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80 RVDATA_INTERNALRAM 0 |
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81 SRVC var |
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82 TR_BAUD_CONFIG var |
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83 WCP_PROF 0 |
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84 |
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85 [sys.cfg] |
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86 |
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87 DSP var |
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88 STD 6 |
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89 |
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90 [trace.cfg] |
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91 |
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92 LAYER_DBG 0xFFFFFFFF |
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93 TRACE_LEVEL_FILTER 5 |