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annotate src/cs/services/fcbm/fcbm_env.c @ 268:f2e52cab0a73

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abb_inth.c: check all interrupt causes, not just one The original code used if - else if - else if etc constructs, thus the first detected interrupt was the only one handled. However, Iota ITSTATREG is a clear-on-read register, thus if we only handle the first detected interrupt and skip checking the others, then the other interrupts will be lost, if more than one interrupt happened to occur in one ABB interrupt handling cycle - a form of rare race condition. Change the code to check all interrupts that were read in this cycle.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 13 Jun 2021 18:17:53 +0000
parents baa738eeb842
children
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1 /*
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2 * This module provides the glue to the RiViera environment
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3 * for our FCBM SWE.
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4 */
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5
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6 #include "fcbm/fcbm_env.h"
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7 #include "rv/rv_general.h"
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8 #include "rvf/rvf_api.h"
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9 #include "rvm/rvm_priorities.h"
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10 #include "rvm/rvm_api.h"
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11 #include "rvm/rvm_use_id_list.h"
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12 #include <string.h>
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13
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14 /* Global variables for FCBM addr_id and prim_id */
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15 T_RVF_ADDR_ID fcbm_addr_id;
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16 T_RVF_MB_ID fcbm_prim_id;
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17
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18 T_RVM_RETURN fcbm_get_info (T_RVM_INFO_SWE *infoSWE)
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19 {
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20 /* SWE info */
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21
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22 infoSWE->swe_type = RVM_SWE_TYPE_4;
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23 infoSWE->type_info.type4.swe_use_id = FCBM_USE_ID;
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24 memcpy( infoSWE->type_info.type4.swe_name, "FCBM", 5 );
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25
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26 infoSWE->type_info.type4.stack_size = FCBM_STACK_SIZE;
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27 infoSWE->type_info.type4.priority = RVM_FCBM_TASK_PRIORITY;
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28
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29 /* memory bank info */
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30 infoSWE->type_info.type4.nb_mem_bank = 1;
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31
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32 memcpy ((UINT8 *) infoSWE->type_info.type4.mem_bank[0].bank_name, "FCBM_PRIM", 10);
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33 infoSWE->type_info.type4.mem_bank[0].initial_params.size = FCBM_MB_PRIM_SIZE;
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34 infoSWE->type_info.type4.mem_bank[0].initial_params.watermark = FCBM_MB_PRIM_WATERMARK;
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35
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36 /* linked SWE info: we depend on FCHG, R2D, KPD */
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37 infoSWE->type_info.type4.nb_linked_swe = 3;
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38 infoSWE->type_info.type4.linked_swe_id[0] = FCHG_USE_ID;
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39 infoSWE->type_info.type4.linked_swe_id[1] = R2D_USE_ID;
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40 infoSWE->type_info.type4.linked_swe_id[2] = KPD_USE_ID;
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41
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42 /* generic functions */
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43 infoSWE->type_info.type4.set_info = fcbm_set_info;
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44 infoSWE->type_info.type4.init = fcbm_init;
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45 infoSWE->type_info.type4.core = fcbm_core;
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46 infoSWE->type_info.type4.stop = fcbm_stop;
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47 infoSWE->type_info.type4.kill = fcbm_kill;
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48
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49 /* Set the return path */
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50 infoSWE->type_info.type4.return_path.callback_func = NULL;
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51 infoSWE->type_info.type4.return_path.addr_id = 0;
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52
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53 return RV_OK;
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54 }
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55
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56 T_RVM_RETURN fcbm_set_info(T_RVF_ADDR_ID addr_id,
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57 T_RV_RETURN return_path[],
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58 T_RVF_MB_ID mbId[],
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59 T_RVM_RETURN (*callBackFct) (T_RVM_NAME SWEntName,
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60 T_RVM_RETURN errorCause,
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61 T_RVM_ERROR_TYPE errorType,
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62 T_RVM_STRING errorMsg))
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63 {
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64 /* Store the addr id */
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65 fcbm_addr_id = addr_id;
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66
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67 /* Store the memory bank id */
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68 fcbm_prim_id = mbId[0];
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69
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70 return RV_OK;
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71 }
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72
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73 T_RVM_RETURN fcbm_init(void)
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74 {
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75 return RV_OK;
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76 }
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77
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78 T_RVM_RETURN fcbm_stop(void)
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79 {
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80 return RV_OK;
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81 }
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82
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83 T_RVM_RETURN fcbm_kill(void)
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84 {
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85 return RV_OK;
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86 }