annotate src/cs/system/main/gcc/vectors.S @ 268:f2e52cab0a73

abb_inth.c: check all interrupt causes, not just one The original code used if - else if - else if etc constructs, thus the first detected interrupt was the only one handled. However, Iota ITSTATREG is a clear-on-read register, thus if we only handle the first detected interrupt and skip checking the others, then the other interrupts will be lost, if more than one interrupt happened to occur in one ABB interrupt handling cycle - a form of rare race condition. Change the code to check all interrupts that were read in this cycle.
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 13 Jun 2021 18:17:53 +0000
parents 4e78acac3d88
children
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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1 /*
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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2 * These 7 branch instructions, corresponding to ARM exception and interrupt
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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3 * vectors, will be placed in different sections depending on the flashImage
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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4 * vs. ramImage configuration and which target we build for; this little
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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5 * snippet file will be #included where it is needed.
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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6 */
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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8 b _arm_undefined
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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9 b _arm_swi
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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10 b _arm_abort_prefetch
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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11 b _arm_abort_data
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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12 b _arm_reserved
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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13 b _INT_IRQ
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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14 b _INT_FIQ