annotate src/cs/drivers/drv_app/lcc/lcc_modulate.h @ 304:58c7961bd0b0 default tip

TCH tap: extend DL sniffing feature to support CSD modes Our debug feature for TCH DL sniffing reads the content of the DSP's a_dd_0 buffer (or a_dd_1 for TCH/H subchannel 1) at appropriate times and forwards captured bits to the host. This feature was originally implemented for TCH/FS, TCH/EFS and TCH/HS - now extend it to cover TCH/F data modes too.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 25 Nov 2024 23:33:27 +0000
parents 4e78acac3d88
children
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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1 /******************************************************************************
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2 * Power Task (pwr)
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3 * Design and coding by Svend Kristian Lindholm, skl@ti.com
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4 *
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5 * PWR SW Modulation
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6 *
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7 * $Id: pwr_modulate.h 1.1 Wed, 20 Aug 2003 10:22:37 +0200 skl $
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8 *
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9 ******************************************************************************/
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10 #ifndef __LCC_MODULATE_H__
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11 #define __LCC_MODULATE_H__
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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13 #include "lcc/lcc.h"
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14 #include "lcc/lcc_cfg.h"
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15
4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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16 // SW modulation using the following addresses
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17 #if (USE_PWL_AS_MODULATOR == 1)
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18 // D-Sample - no modulation - just envelope function to simulate GPIO 6
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19 #define PWL_LEVEL_REG (*(volatile unsigned char*) 0xFFFE8000)
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20 #define PWL_CTRL_REG (*(volatile unsigned char*) 0xFFFE8001)
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21 #define BUZZ_LIGHT_REG (*(volatile short*) 0xFFFE480E) // Enable buzzer (bit 0) and PWL (bit 1)
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22 #endif
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23 /******************************************************************************
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24 * Function prototypes
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25 ******************************************************************************/
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4e78acac3d88 src/{condat,cs,gpf,nucleus}: import from Selenite
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27 void pwr_modulate_init(void);
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28 void pwr_modulate_on(void);
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29 void pwr_modulate_off(void);
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30
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31 #endif