FreeCalypso > hg > fc-tourmaline
annotate src/g23m-fad/l2r/l2r_upp.c @ 304:58c7961bd0b0 default tip
TCH tap: extend DL sniffing feature to support CSD modes
Our debug feature for TCH DL sniffing reads the content of the DSP's
a_dd_0 buffer (or a_dd_1 for TCH/H subchannel 1) at appropriate times
and forwards captured bits to the host. This feature was originally
implemented for TCH/FS, TCH/EFS and TCH/HS - now extend it to cover
TCH/F data modes too.
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Mon, 25 Nov 2024 23:33:27 +0000 |
parents | fa8dc04885d8 |
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rev | line source |
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1
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1 /* |
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2 +----------------------------------------------------------------------------- |
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3 | Project : CSD (8411) |
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4 | Modul : L2r_upp.c |
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5 +----------------------------------------------------------------------------- |
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6 | Copyright 2002 Texas Instruments Berlin, AG |
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7 | All rights reserved. |
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8 | |
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9 | This file is confidential and a trade secret of Texas |
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10 | Instruments Berlin, AG |
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11 | The receipt of or possession of this file does not convey |
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12 | any rights to reproduce or disclose its contents or to |
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13 | manufacture, use, or sell anything it may describe, in |
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14 | whole, or in part, without the specific written consent of |
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15 | Texas Instruments Berlin, AG. |
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16 +----------------------------------------------------------------------------- |
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17 | Purpose : This Modul defines the functions for processing |
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18 | of incomming primitives for the component |
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19 | L2R of the base station |
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20 +----------------------------------------------------------------------------- |
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21 */ |
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22 |
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23 #ifndef L2R_UPP_C |
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24 #define L2R_UPP_C |
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25 #endif |
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26 |
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27 #define ENTITY_L2R |
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28 |
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29 /*==== INCLUDES ===================================================*/ |
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30 |
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31 #include <string.h> |
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32 #include "typedefs.h" |
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33 #include "pconst.cdg" |
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34 #include "vsi.h" |
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35 #include "macdef.h" |
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36 #include "custom.h" |
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37 #include "gsm.h" |
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38 #include "cus_l2r.h" |
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39 #include "cnf_l2r.h" |
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40 #include "mon_l2r.h" |
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41 #include "prim.h" |
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42 #include "pei.h" |
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43 #include "tok.h" |
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44 #include "dti.h" /* functionality of the dti library */ |
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45 |
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46 #include "cl_ribu.h" |
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47 #include "l2r.h" |
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48 |
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49 /*==== CONST =======================================================*/ |
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50 /*==== TYPES =======================================================*/ |
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51 /*==== VAR EXPORT ==================================================*/ |
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52 /*==== VAR LOCAL ===================================================*/ |
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53 /*==== FUNCTIONS ===================================================*/ |
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54 |
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55 /* |
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56 +------------------------------------------------------------------------------ |
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57 | Function : sig_dti_up_data_received_ind |
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58 +------------------------------------------------------------------------------ |
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59 | Description : Process primitive DTI2_DATA_REQ received from CSDIWF. |
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60 | |
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61 | Parameters : dti_data_req - |
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62 | |
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63 | |
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64 | Return : - |
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65 +------------------------------------------------------------------------------ |
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66 */ |
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67 |
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68 GLOBAL void sig_dti_up_data_received_ind(T_DTI2_DATA_REQ *dti_data_req) |
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69 { |
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70 T_UP *dup = &l2r_data->up; |
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71 |
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72 TRACE_FUNCTION ("sig_dti_up_data_received_ind()"); |
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73 |
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74 PACCESS (dti_data_req); |
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75 |
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76 switch (GET_STATE (UP)) |
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77 { |
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78 case UP_CONNECTED: |
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79 { |
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80 if (GET_STATE (DTI) NEQ DTI_CLOSED) |
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81 { |
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82 /* |
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83 * do not send flow control primitives automatically |
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84 */ |
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85 dti_stop(l2r_hDTI, L2R_DTI_UP_DEF_INSTANCE, L2R_DTI_UP_INTERFACE, L2R_DTI_UP_CHANNEL); |
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86 } |
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87 |
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88 SET_STATE (UP_UL, IW_IDLE); |
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89 dup->Prim = dti_data_req; |
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90 |
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91 /* detect break request */ |
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92 if (dup->Prim->parameters.st_lines.st_break_len NEQ DTI_BREAK_OFF) |
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93 { |
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94 sig_up_mgt_break_ind(dup->Prim); |
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95 } |
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96 else |
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97 { |
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98 up_store_data(); |
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99 } |
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100 |
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101 switch (GET_STATE (UP_LL)) |
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102 { |
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103 case ISW_WAIT: |
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104 if (dup->LLFlow EQ FL_INACTIVE AND dup->RiBu.idx.filled) |
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105 { |
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106 /* L_UDR_1 */ |
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107 TIMERSTOP (TIMER_TUP_SND); |
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108 up_send_current_prim(); |
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109 |
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110 if (!dup->RiBu.idx.filled) |
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111 { |
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112 SET_STATE (UP_LL, ISW_IDLE); |
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113 } |
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114 else |
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115 { |
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116 SET_STATE (UP_LL, ISW_SEND); |
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117 } |
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118 } |
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119 else |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
120 { |
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121 /* L_UDR_2 */ |
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122 if( dup->LastSentFlow EQ dup->MrgFlow ) |
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parents:
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123 return; |
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parents:
diff
changeset
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124 |
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125 TIMERSTOP (TIMER_TUP_SND); |
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parents:
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126 |
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127 switch (dup->LLFlow) |
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128 { |
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129 case FL_INACTIVE: |
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130 up_send_prim_timeout(); |
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131 break; |
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parents:
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132 |
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133 case FL_ACTIVE: |
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134 up_send_empty_frame(dup->LastSentSa, dup->LastSentSb, dup->MrgFlow); |
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135 break; |
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parents:
diff
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|
136 } |
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parents:
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changeset
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137 |
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138 if (!dup->RiBu.idx.filled) |
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139 { |
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140 SET_STATE (UP_LL, ISW_IDLE); |
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141 } |
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parents:
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142 else |
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parents:
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changeset
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143 { |
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144 SET_STATE (UP_LL, ISW_SEND); |
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145 } |
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parents:
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|
146 } |
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|
147 break; |
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148 |
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|
149 default: |
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150 if (!dup->RiBu.idx.filled) /* no primitive is ready */ |
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parents:
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|
151 return; |
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parents:
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|
152 |
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153 /* L_UDR3 */ |
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|
154 up_check_flow(); |
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|
155 up_check_alloc(); |
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156 SET_STATE (UP_LL, ISW_SEND); |
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|
157 break; |
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parents:
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|
158 } |
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parents:
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|
159 break; |
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parents:
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changeset
|
160 } |
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parents:
diff
changeset
|
161 } |
fa8dc04885d8
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parents:
diff
changeset
|
162 } |
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diff
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|
163 |
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diff
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|
164 /* |
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165 +------------------------------------------------------------------------------ |
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166 | Function : up_rlp_ready_ind |
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|
167 +------------------------------------------------------------------------------ |
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168 | Description : Process primitive RLP_READY_IND received from RLP. |
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169 | |
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170 | Parameters : rlp_ready_ind - |
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|
171 | |
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parents:
diff
changeset
|
172 | |
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|
173 | Return : - |
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parents:
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|
174 +------------------------------------------------------------------------------ |
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diff
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|
175 */ |
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|
176 |
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|
177 GLOBAL void up_rlp_ready_ind(T_RLP_READY_IND *rlp_ready_ind) |
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diff
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|
178 { |
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|
179 T_UP *dup = &l2r_data->up; |
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diff
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|
180 |
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parents:
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|
181 TRACE_FUNCTION ("rlp_ready_ind()"); |
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|
182 PACCESS (rlp_ready_ind); |
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parents:
diff
changeset
|
183 |
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|
184 switch (GET_STATE (UP)) |
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parents:
diff
changeset
|
185 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
186 case UP_CONNECTED: |
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parents:
diff
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|
187 switch (GET_STATE (UP_LL)) |
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parents:
diff
changeset
|
188 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
189 case ISW_SEND: |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
190 if (dup->LLFlow EQ FL_INACTIVE OR dup->UrgentMsg) |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
191 { |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
192 up_send_current_prim(); |
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parents:
diff
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|
193 if (!dup->RiBu.idx.filled) |
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diff
changeset
|
194 { |
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diff
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|
195 SET_STATE (UP_LL, ISW_IDLE); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
196 } |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
197 } |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
198 else |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
199 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
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diff
changeset
|
200 if (dup->LastSentFlow NEQ dup->MrgFlow) |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
201 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
202 up_send_empty_frame(dup->LastSentSa, dup->LastSentSb, dup->MrgFlow); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
203 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
204 else |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
205 { |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
206 SET_STATE (UP_LL, ISW_WAIT); |
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
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|
207 TIMERSTART(TIMER_TUP_SND, LL_TO); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
208 } |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
209 } |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
210 break; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
211 |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
212 default: |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
213 SET_STATE (UP_LL, ISW_WAIT); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
214 TIMERSTART(TIMER_TUP_SND, LL_TO); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
215 break; |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
216 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
217 break; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
218 |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
219 case UP_REMAP: |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
220 SET_STATE (UP_LL, ISW_WAIT); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
221 break; |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
222 } |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
223 PFREE (rlp_ready_ind); |
fa8dc04885d8
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Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
224 } |
fa8dc04885d8
src/g23m-*: import from Magnetite
Mychaela Falconia <falcon@freecalypso.org>
parents:
diff
changeset
|
225 |