FreeCalypso > hg > fc-tourmaline
comparison src/cs/drivers/drv_core/armio/armio.c @ 0:4e78acac3d88
src/{condat,cs,gpf,nucleus}: import from Selenite
author | Mychaela Falconia <falcon@freecalypso.org> |
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date | Fri, 16 Oct 2020 06:23:26 +0000 |
parents | |
children | 6fb17a32c5bd |
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-1:000000000000 | 0:4e78acac3d88 |
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1 /* | |
2 * ARMIO.C | |
3 * | |
4 * | |
5 * Control diagnostic bits | |
6 * | |
7 * Reference : GCS207 | |
8 * | |
9 */ | |
10 | |
11 | |
12 #include "l1sw.cfg" | |
13 #include "swconfig.cfg" | |
14 #ifdef BLUETOOTH_INCLUDED | |
15 #include "btemobile.cfg" | |
16 #endif | |
17 #if (OP_L1_STANDALONE == 1) | |
18 #include "l1_macro.h" | |
19 #include "l1_confg.h" | |
20 #endif | |
21 #include "board.cfg" | |
22 #include "chipset.cfg" | |
23 #include "fc-target.h" | |
24 | |
25 #if (OP_L1_STANDALONE == 0) | |
26 #include "main/sys_types.h" | |
27 #else | |
28 #include "sys_types.h" | |
29 #endif | |
30 | |
31 | |
32 #include "memif/mem.h" | |
33 | |
34 #include "inth/iq.h" | |
35 #include "armio/armio.h" | |
36 #include "abb/abb.h" // for AI_Power function : to be removed, use ABB_Power_Off in abb.c file instead !!! | |
37 | |
38 #ifdef CONFIG_TANGO_MODEM | |
39 #include "ffs/ffs_api.h" | |
40 | |
41 SYS_UWORD8 AI_Tango_pinmux[4]; | |
42 #endif | |
43 | |
44 #if (CHIPSET != 12) | |
45 /* | |
46 * AI_EnableBit | |
47 * | |
48 * Enable ARMIO input/output bit (see CLKM module specification) | |
49 */ | |
50 void AI_EnableBit(int bit) | |
51 { | |
52 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) |= (1<<bit); | |
53 } | |
54 | |
55 /* | |
56 * AI_DisableBit | |
57 * | |
58 * Disable ARMIO input/output bit (see CLKM module specification) | |
59 */ | |
60 void AI_DisableBit(int bit) | |
61 { | |
62 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) &= ~(1<<bit); | |
63 } | |
64 | |
65 #endif /* CHIPSET != 12 */ | |
66 | |
67 /* | |
68 * AI_SetBit | |
69 * | |
70 * Switch-on one bit | |
71 */ | |
72 void AI_SetBit(int bit) | |
73 { | |
74 *((volatile SYS_UWORD16 *) ARMIO_OUT) |= (1<<bit); | |
75 } | |
76 | |
77 /* | |
78 * AI_ResetBit | |
79 * | |
80 * Switch-off one bit | |
81 */ | |
82 void AI_ResetBit(int bit) | |
83 { | |
84 *((volatile SYS_UWORD16 *) ARMIO_OUT) &= ~(1<<bit); | |
85 } | |
86 | |
87 /* | |
88 * AI_ConfigBitAsOutput | |
89 * | |
90 * Set this bit as an output | |
91 */ | |
92 void AI_ConfigBitAsOutput(int bit) | |
93 { | |
94 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) &= ~(1<<bit); | |
95 } | |
96 | |
97 /* | |
98 * AI_ConfigBitAsInput | |
99 * | |
100 * Set this bit as an input | |
101 */ | |
102 void AI_ConfigBitAsInput(int bit) | |
103 { | |
104 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) |= (1<<bit); | |
105 } | |
106 | |
107 | |
108 /* | |
109 * AI_ReadBit | |
110 * | |
111 * Read value in register | |
112 */ | |
113 SYS_BOOL AI_ReadBit(int bit) | |
114 { | |
115 if ((*((volatile SYS_UWORD16 *) ARMIO_IN)) & (1<<bit)) | |
116 return (1); | |
117 else | |
118 return (0); | |
119 } | |
120 | |
121 /* | |
122 * AI_Power | |
123 * | |
124 * Switch-on or off the board | |
125 * | |
126 * Parameters : SYS_UWORD8 power: 1 to power-on (maintain power) | |
127 * 0 to power-off | |
128 * | |
129 */ | |
130 #if (OP_L1_STANDALONE == 0) | |
131 void AI_Power(SYS_UWORD8 power) | |
132 { | |
133 if (power == 0) | |
134 { | |
135 ABB_Power_Off(); | |
136 } | |
137 } | |
138 #endif | |
139 | |
140 /* | |
141 * AI_ResetIoConfig | |
142 * | |
143 * Reset all default IO configurations | |
144 * | |
145 */ | |
146 void AI_ResetIoConfig(void) | |
147 { | |
148 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0xFFFF; // all bits are inputs | |
149 #if (CHIPSET != 12) | |
150 *((volatile SYS_UWORD16 *) CLKM_IO_CNTL) = 0; // default config | |
151 #endif /* CHIPSET != 12 */ | |
152 } | |
153 | |
154 | |
155 /* | |
156 * AI_ClockEnable | |
157 * | |
158 * Enable ARMIO clock module | |
159 * | |
160 */ | |
161 void AI_ClockEnable(void) | |
162 { | |
163 *((volatile SYS_UWORD16 *) ARMIO_CNTL_REG) |= ARMIO_CLOCKEN; // set to 1 bit 5 | |
164 } | |
165 | |
166 | |
167 /* | |
168 * AI_InitIOConfig | |
169 * | |
170 * Configure all GPIOs at initialization in order to optimize the power consumption | |
171 * of the C-Sample : | |
172 * - select IOs 8,9,10,11,12 and 13 on the pins instead of MCSI and MCUEN signals. | |
173 * - configure these IOs in output high. | |
174 * - configure the IOs 0 (Vibrator LED) and 1 (LCD_A0) in output low. | |
175 */ | |
176 void AI_InitIOConfig(void) | |
177 { | |
178 // reset the IOs config | |
179 AI_ResetIoConfig(); | |
180 | |
181 // CLKM_IO_CNTL register configuration : | |
182 // select IOs 6,8,9,10,11,12 and 13 on the pins instead of MCSI and MCUEN signals. | |
183 AI_EnableBit(0); /* FreeCalypso addition */ | |
184 AI_EnableBit(2); | |
185 AI_EnableBit(4); | |
186 | |
187 #ifdef CONFIG_TARGET_PIRELLI | |
188 AI_EnableBit(1); | |
189 AI_EnableBit(3); | |
190 #endif | |
191 | |
192 /* Bits 5,6,7,8 are used to output I/O 9,10,11,12 or MCSI pins */ | |
193 /* If Bluetooth, IO should be disabled, outputting MCSI used for Bluetooth voice */ | |
194 /* | |
195 * FreeCalypso change: we don't have BT, our new criterion is | |
196 * whether or not a given board is wired for MCSI. | |
197 */ | |
198 #if defined(CONFIG_MCSI_MODEM) || defined(CONFIG_TARGET_PIRELLI) | |
199 AI_DisableBit(5); | |
200 AI_DisableBit(6); | |
201 AI_DisableBit(7); | |
202 AI_DisableBit(8); | |
203 #else | |
204 AI_EnableBit(5); | |
205 AI_EnableBit(6); | |
206 AI_EnableBit(7); | |
207 AI_EnableBit(8); | |
208 #endif | |
209 | |
210 AI_EnableBit(9); | |
211 | |
212 // ARMIO_OUT register configuration : | |
213 // set IOs 8,9,10,11,12 and 13 as high | |
214 // set IOs 0 to 7 as low | |
215 | |
216 #ifdef CONFIG_TARGET_C11X | |
217 /* C11x GPIO configuration mimics what the original fw sets */ | |
218 | |
219 /* GPIO out all zeros */ | |
220 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000; | |
221 | |
222 /* setting of GPIOs as outputs: register setting from the original fw */ | |
223 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0x2209; | |
224 | |
225 #elif defined(CONFIG_TARGET_C139) | |
226 /* C139 GPIO configuration mimics what the original fw sets */ | |
227 | |
228 /* GPIO out all zeros - the LCD backlight is OFF */ | |
229 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000; | |
230 | |
231 /* setting of GPIOs as outputs: register setting from the original fw */ | |
232 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0x2A09; | |
233 | |
234 #elif defined(CONFIG_TARGET_C155) | |
235 /* C155 GPIO config based on the available schematics */ | |
236 | |
237 /* GPIO out all zeros - the LCD backlight is OFF */ | |
238 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000; | |
239 | |
240 AI_ConfigBitAsOutput(1); /* LCD backlight control */ | |
241 AI_ConfigBitAsOutput(2); /* headset jack switch */ | |
242 AI_ConfigBitAsOutput(3); /* LCDA0 (?) */ | |
243 AI_ConfigBitAsOutput(8); /* MUSIC_A0 */ | |
244 AI_ConfigBitAsOutput(12); /* MUSIC_ON */ | |
245 | |
246 #elif defined(CONFIG_TARGET_J100) | |
247 /* | |
248 * GPIO config on this target is based on the disassembly of | |
249 * Init_Target() and AI_InitIOConfig() functions in the official fw. | |
250 */ | |
251 | |
252 /* GPIO out all zeros - the LCD backlight is OFF */ | |
253 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000; | |
254 | |
255 /* setting of GPIOs as outputs: register setting from the original fw */ | |
256 *((volatile SYS_UWORD16 *) ARMIO_IO_CNTL) = 0x2A59; | |
257 | |
258 #elif defined(CONFIG_TARGET_PIRELLI) | |
259 | |
260 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x0000; | |
261 | |
262 AI_ConfigBitAsOutput(1); | |
263 AI_ConfigBitAsOutput(4); | |
264 AI_ConfigBitAsOutput(7); | |
265 | |
266 #else /* classic TI/Openmoko/FreeCalypso targets */ | |
267 // set IOs 1 and 8 to 13 as high | |
268 // set IOs 0 and 2 to 7 as low | |
269 // On D-Sample GPIO 1 must be set to high to enable the audio amplifier, | |
270 // but on Openmoko's modem it is the interrupt to the AP. | |
271 // On the FCDEV3B it also controls the audio amplifier. | |
272 // On the GTM900 GPIOs 0 and 1 are RI and DSR outputs, respectively. | |
273 // For targets other than GTM900, we enable the audio amplifier | |
274 // if we are in an MMI!=0 build - for ACI builds use the AT@SPKR command. | |
275 #ifdef CONFIG_TARGET_GTM900 | |
276 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F05; | |
277 #elif (MMI != 0) || defined(CONFIG_GPIO1_HIGH) | |
278 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F06; | |
279 #else | |
280 *((volatile SYS_UWORD16 *) ARMIO_OUT) = 0x3F04; | |
281 #endif | |
282 | |
283 // ARMIO_CNTL_REG register configuration : | |
284 // set IOs 1,2,5,7,9,14 and 15 as ouputs. | |
285 // all others are FreeCalypso additions | |
286 #if defined(CONFIG_GPIO046_OUTPUTS) || defined(CONFIG_TARGET_GTM900) | |
287 AI_ConfigBitAsOutput(0); | |
288 #endif | |
289 #ifndef CONFIG_TANGO_MODEM /* we do dynamic config on Tango instead */ | |
290 AI_ConfigBitAsOutput(1); | |
291 #ifndef CONFIG_TARGET_LEONARDO /* GPIO 2 is an input on Leonardo! */ | |
292 AI_ConfigBitAsOutput(2); | |
293 #endif | |
294 #ifdef CONFIG_GPIO3_OUTPUT | |
295 AI_ConfigBitAsOutput(3); | |
296 #endif | |
297 #endif | |
298 #ifdef CONFIG_GPIO046_OUTPUTS | |
299 AI_ConfigBitAsOutput(4); | |
300 #endif | |
301 AI_ConfigBitAsOutput(5); | |
302 #ifdef CONFIG_GPIO046_OUTPUTS | |
303 AI_ConfigBitAsOutput(6); | |
304 #endif | |
305 AI_ConfigBitAsOutput(7); | |
306 #if 1 /* FreeCalypso addition for all targets */ | |
307 AI_ConfigBitAsOutput(8); | |
308 #endif | |
309 AI_ConfigBitAsOutput(9); | |
310 #ifdef CONFIG_MCSI_UNUSED | |
311 AI_ConfigBitAsOutput(10); | |
312 AI_ConfigBitAsOutput(11); | |
313 AI_ConfigBitAsOutput(12); | |
314 #endif | |
315 #if 1 /* FreeCalypso addition for all targets */ | |
316 AI_ConfigBitAsOutput(13); | |
317 #endif | |
318 AI_ConfigBitAsOutput(14); | |
319 AI_ConfigBitAsOutput(15); | |
320 #endif | |
321 } | |
322 | |
323 #ifdef CONFIG_TANGO_MODEM | |
324 void AI_Init_Tango_pinmux(void) | |
325 { | |
326 ffs_file_read("/etc/tango-pinmux", AI_Tango_pinmux, 4); | |
327 /* apply this config */ | |
328 if (AI_Tango_pinmux[0] & 0x80) { | |
329 if (AI_Tango_pinmux[0] & 1) | |
330 AI_SetBit(1); | |
331 else | |
332 AI_ResetBit(1); | |
333 AI_ConfigBitAsOutput(1); | |
334 } | |
335 /* GPIO2 config */ | |
336 if (AI_Tango_pinmux[1] & 0x02) { | |
337 if (AI_Tango_pinmux[1] & 0x01) | |
338 AI_SetBit(2); | |
339 else | |
340 AI_ResetBit(2); | |
341 AI_ConfigBitAsOutput(2); | |
342 } | |
343 /* GPIO3 config */ | |
344 if (AI_Tango_pinmux[1] & 0x20) { | |
345 if (AI_Tango_pinmux[1] & 0x10) | |
346 AI_SetBit(3); | |
347 else | |
348 AI_ResetBit(3); | |
349 AI_ConfigBitAsOutput(3); | |
350 } | |
351 /* RESET_OUT/IO7 config */ | |
352 if (AI_Tango_pinmux[2] & 0x08) { | |
353 AI_EnableBit(3); | |
354 if (AI_Tango_pinmux[2] & 0x02) { | |
355 if (AI_Tango_pinmux[2] & 0x01) | |
356 AI_SetBit(7); | |
357 else | |
358 AI_ResetBit(7); | |
359 } else | |
360 AI_ConfigBitAsInput(7); | |
361 } | |
362 /* MCSI/GPIO config */ | |
363 if (AI_Tango_pinmux[2] & 0x80) { | |
364 if (AI_Tango_pinmux[3] & 0x10) { | |
365 if (AI_Tango_pinmux[3] & 0x01) | |
366 AI_SetBit(9); | |
367 else | |
368 AI_ResetBit(9); | |
369 } else | |
370 AI_ConfigBitAsInput(9); | |
371 AI_EnableBit(5); | |
372 AI_EnableBit(6); | |
373 AI_EnableBit(7); | |
374 AI_EnableBit(8); | |
375 if (AI_Tango_pinmux[3] & 0x20) { | |
376 if (AI_Tango_pinmux[3] & 0x02) | |
377 AI_SetBit(10); | |
378 else | |
379 AI_ResetBit(10); | |
380 AI_ConfigBitAsOutput(10); | |
381 } | |
382 if (AI_Tango_pinmux[3] & 0x40) { | |
383 if (AI_Tango_pinmux[3] & 0x04) | |
384 AI_SetBit(11); | |
385 else | |
386 AI_ResetBit(11); | |
387 AI_ConfigBitAsOutput(11); | |
388 } | |
389 if (AI_Tango_pinmux[3] & 0x80) { | |
390 if (AI_Tango_pinmux[3] & 0x08) | |
391 AI_SetBit(12); | |
392 else | |
393 AI_ResetBit(12); | |
394 AI_ConfigBitAsOutput(12); | |
395 } | |
396 } | |
397 } | |
398 #endif | |
399 | |
400 /* | |
401 * AI_SelectIOForIT | |
402 * | |
403 * Select which IO will be used to generate an interrupt. | |
404 * 'Edge' specifies if interrup must be detected on falling or rising edge. | |
405 * | |
406 * Warning: parameters are not checked. | |
407 */ | |
408 | |
409 void AI_SelectIOForIT (SYS_UWORD16 Pin, SYS_UWORD16 Edge) | |
410 { | |
411 #if (CHIPSET == 12) | |
412 /* | |
413 * Update INTERRUPT_LEVEL_REG with Edge configuration on Pin selection | |
414 */ | |
415 GPIO_INTERRUPT_LEVEL_REG = (Edge & 0x0001) << Pin; | |
416 | |
417 /* | |
418 * Update INTERRUPT_MASK_REG to enable interrupt generation on Pin selection | |
419 */ | |
420 GPIO_INTERRUPT_MASK_REG = 1 << Pin; | |
421 #else | |
422 /* | |
423 * Bit SET_GPIO_EVENT_MODE (bit 0) is set to enable the GPIO event mode. | |
424 */ | |
425 | |
426 *((volatile SYS_UWORD16 *) ARMIO_GPIO_EVENT_MODE) = (Pin << 1) + (Edge << 5) + 1; | |
427 #endif | |
428 } | |
429 | |
430 #if (CHIPSET != 12) | |
431 /* | |
432 * AI_CheckITSource | |
433 * | |
434 * Check if the interrupt specified by 'Source' is active or not. | |
435 * | |
436 * Output: 0: IT is not active | |
437 * 1: IT is active | |
438 * | |
439 * Warning: parameters are not checked. | |
440 * | |
441 * Warning: If the keypad and GPIO interrupts may occur the GPIO interrupt | |
442 * must be checked first because the GPIO status bit is reset when | |
443 * the register is read. | |
444 */ | |
445 | |
446 int AI_CheckITSource (SYS_UWORD16 Source) | |
447 { | |
448 return (*((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_INT) & Source ? 1 : 0); | |
449 } | |
450 | |
451 /* | |
452 * AI_UnmaskIT | |
453 * | |
454 * Unmask the IT specified by 'Source' (keyboard or GPIO). | |
455 * | |
456 * Warning: parameters are not checked. | |
457 */ | |
458 | |
459 void AI_UnmaskIT (SYS_UWORD16 Source) | |
460 { | |
461 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) &= ~Source; | |
462 } | |
463 | |
464 /* | |
465 * AI_MaskIT | |
466 * | |
467 * Mask the IT specified by 'Source' (keyboard or GPIO). | |
468 * | |
469 * Warning: parameters are not checked. | |
470 */ | |
471 | |
472 void AI_MaskIT (SYS_UWORD16 Source) | |
473 { | |
474 *((volatile SYS_UWORD16 *) ARMIO_KBD_GPIO_MASKIT) |= Source; | |
475 } | |
476 #endif /* CHIPSET != 12 */ | |
477 | |
478 #if (CHIPSET == 12) | |
479 | |
480 void AI_MaskIT(SYS_UWORD16 d_io_number) { | |
481 GPIO_INTERRUPT_MASK_REG |= (1 << d_io_number); | |
482 } /* f_gpio_mask_it() */ | |
483 | |
484 void AI_UnmaskIT(SYS_UWORD16 d_io_number) { | |
485 GPIO_INTERRUPT_MASK_REG &= ~(1 << d_io_number); | |
486 } /* f_gpio_unmask_it() */ | |
487 | |
488 #endif |