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comparison src/cs/drivers/drv_core/inth/niq32.c @ 0:4e78acac3d88

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src/{condat,cs,gpf,nucleus}: import from Selenite
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 16 Oct 2020 06:23:26 +0000
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-1:000000000000 0:4e78acac3d88
1 /******************************************************************************
2 TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
3
4 Property of Texas Instruments -- For Unrestricted Internal Use Only
5 Unauthorized reproduction and/or distribution is strictly prohibited. This
6 product is protected under copyright law and trade secret law as an
7 unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
8 rights reserved.
9
10
11 Filename : niq32.c
12
13 Description : Nucleus IQ initializations
14
15 Project : Drivers
16
17 Author : proussel@ti.com Patrick Roussel.
18
19 Version number : 1.25
20
21 Date : 08/22/03
22
23 Previous delta : 12/19/00 14:24:51
24
25 *******************************************************************************/
26
27 #include "l1sw.cfg"
28
29 #include "chipset.cfg"
30 #include "board.cfg"
31 #include "rf.cfg"
32 #include "swconfig.cfg"
33 #include "fc-target.h"
34
35 #if(OP_L1_STANDALONE == 0)
36 #include "debug.cfg"
37 #include "rv/rv_defined_swe.h"
38 #include "rtc/board/rtc_config.h"
39 #else
40 #include "l1_macro.h"
41 #include "l1_confg.h"
42 #endif
43
44 #if(OP_L1_STANDALONE == 0)
45 #include "swconfig.cfg"
46 #ifdef BLUETOOTH_INCLUDED
47 #include "btemobile.cfg"
48 #ifdef BT_CLK_REQ_INT
49 #include "board/bth_drv.h"
50 #endif
51 #endif
52 #endif
53
54
55 #if(L1_DYN_DSP_DWNLD == 1)
56 #include "l1_api_hisr.h"
57 #endif
58
59 #if (OP_L1_STANDALONE == 0)
60 #include "main/sys_types.h"
61 #else
62 #include "sys_types.h"
63 #endif
64
65 #if (CHIPSET == 12)
66 #include "sys_inth.h"
67 #else
68 #include "inth/inth.h"
69 #include "memif/mem.h"
70 #if (OP_L1_STANDALONE == 1)
71 #include "serialswitch_core.h"
72 #else
73 #include "uart/serialswitch.h"
74 #endif
75
76 #if (OP_L1_STANDALONE == 0)
77 #include "sim/sim.h"
78 #endif
79 #endif
80
81 #include "abb/abb_core_inth.h" // for External Interrupt
82 #define IQ_H
83 #include "inth/iq.h"
84 #include "ulpd/ulpd.h"
85 #if (BOARD == 34)
86 #include "csmi/csmi.h"
87 #endif
88
89 #if (defined RVM_DAR_SWE) && (defined _GSM)
90 extern void dar_watchdog_reset(void);
91 #endif
92
93 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45))
94 #include "armio/armio.h"
95 #if (OP_L1_STANDALONE == 0)
96 #include "uart/uartfax.h"
97 #endif
98 #endif
99
100 /* External declaration */
101 extern void GAUGING_Handler(void);
102 extern void TMT_Timer_Interrupt(void);
103 #if (OP_L1_STANDALONE == 1)
104 extern void TM_Timer1Handler(void);
105 #endif
106 extern void kpd_key_handler(void);
107 extern void TP_FrameIntHandler(void);
108
109 #if (OP_L1_STANDALONE == 0)
110 #if (defined RVM_MPM_SWE)
111 extern void MPM_InterruptHandler(void);
112 #endif
113
114 #if (TI_PROFILER == 1)
115 extern void ti_profiler_tdma_action(void);
116 #endif
117
118 #if(RF_FAM==35)
119 extern void TSP_RxHandler(void);
120 #endif
121
122 extern void RTC_GaugingHandler(void);
123 extern void RTC_ItTimerHandle(void);
124 extern void RTC_ItAlarmHandle(void);
125 #endif
126
127
128
129 /* Global variables */
130 unsigned IQ_TimerCount1; /* Used to check if timer is incrementing */
131 unsigned IQ_TimerCount2; /* Used to check if timer is incrementing */
132 unsigned IQ_TimerCount; /* Used to check if timer is incrementing */
133 unsigned IQ_DummyCount; /* Used to check if dummy IT */
134 unsigned IQ_FrameCount; /* Used to check if Frame IT TPU*/
135 unsigned IQ_GsmTimerCount; /* Used to check if GSM Timer IT */
136
137
138 #if (CHIPSET != 12)
139 /*--------------------------------------------------------------*/
140 /* irqHandlers */
141 /*--------------------------------------------------------------*/
142 /* Parameters :none */
143 /* Return : none */
144 /* Functionality : Table of interrupt handlers */
145 /* These MUST be 32-bit entries */
146 /*--------------------------------------------------------------*/
147
148 SYS_FUNC irqHandlers[IQ_NUM_INT] =
149 {
150 IQ_TimerHandler, /* Watchdog timer */
151 IQ_TimerHandler1, /* timer 1 */
152 IQ_TimerHandler2, /* timer 2 */
153 IQ_Dummy, /* AIRQ 3 */
154 IQ_FrameHandler, /* TPU Frame It AIRQ 4 */
155 IQ_Dummy, /* AIRQ 5 */
156 #if (OP_L1_STANDALONE == 0)
157 SIM_IntHandler, /* AIRQ 6 */
158 #else
159 IQ_Dummy, /* AIRQ 6 */
160 #endif
161 #if ((CHIPSET == 2) || (CHIPSET == 3))
162 SER_uart_handler, /* AIRQ 7 */
163 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
164 SER_uart_modem_handler, /* AIRQ 7 */
165 #endif
166 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41))
167 IQ_KeypadGPIOHandler, /* AIRQ 8 */
168 #else
169 IQ_KeypadHandler, /* AIRQ 8 */
170 #endif
171 IQ_Rtc_Handler, /* AIRQ 9 RTC Timer*/
172 #if ((CHIPSET == 2) || (CHIPSET == 3))
173 IQ_RtcA_GsmTim_Handler, /* AIRQ 10 RTC ALARM OR ULPD GSM TIMER*/
174 #elif ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
175 IQ_RtcA_Handler, /* AIRQ 10 RTC ALARM */
176 #endif
177 IQ_Gauging_Handler, /* AIRQ 11 ULPD GAUGING */
178 IQ_External, /* AIRQ 12 */
179 IQ_Dummy, /* AIRQ 13 */
180 IQ_Dummy, /* DMA interrupt */
181 #if (CHIPSET == 4)
182 IQ_Dummy, /* LEAD */
183 IQ_Dummy, /* SIM card-detect fast interrupt */
184 IQ_Dummy, /* External fast interrupt */
185 SER_uart_irda_handler, /* UART IrDA interrupt */
186 IQ_GsmTim_Handler /* ULPD GSM timer */
187 #elif ((CHIPSET == 5) || (CHIPSET == 6))
188 IQ_Dummy, /* LEAD */
189 IQ_Dummy, /* SIM card-detect fast interrupt */
190 IQ_Dummy, /* External fast interrupt */
191 SER_uart_irda_handler, /* UART IrDA interrupt */
192 IQ_GsmTim_Handler, /* ULPD GSM timer */
193 #if (BOARD == 34)
194 IQ_IcrHandler32,
195 #else
196 IQ_Dummy, /* Not mapped interrupt */
197 #endif
198 IQ_Dummy, /* Not mapped interrupt */
199 IQ_Dummy, /* Not mapped interrupt */
200 IQ_Dummy, /* Not mapped interrupt */
201 IQ_Dummy /* GEA interrupt */
202 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11))
203 #if (L1_DYN_DSP_DWNLD == 1)
204 IQ_ApiHandler, /* LEAD */
205 #else
206 IQ_Dummy, /* LEAD */
207 #endif
208 IQ_Dummy, /* SIM card-detect fast interrupt */
209 IQ_Dummy, /* External fast interrupt */
210 SER_uart_irda_handler, /* UART IrDA interrupt */
211 IQ_GsmTim_Handler, /* ULPD GSM timer */
212 IQ_Dummy /* GEA interrupt */
213 #elif (CHIPSET == 9)
214 IQ_Dummy, /* LEAD */
215 IQ_Dummy, /* SIM card-detect fast interrupt */
216 IQ_Dummy, /* External fast interrupt */
217 SER_uart_irda_handler, /* UART IrDA interrupt */
218 IQ_GsmTim_Handler, /* ULPD GSM timer */
219 IQ_Dummy, /* Not mapped interrupt */
220 IQ_Dummy, /* Not mapped interrupt */
221 IQ_Dummy, /* Not mapped interrupt */
222 IQ_Dummy, /* Not mapped interrupt */
223 IQ_Dummy /* Reserved */
224 #else
225 IQ_Dummy /* LEAD */
226 #endif
227 };
228
229 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
230 /*--------------------------------------------------------------*/
231 /* fiqHandlers */
232 /*--------------------------------------------------------------*/
233 /* Parameters :none */
234 /* Return :none */
235 /* Functionality : Table of interrupt handlers */
236 /* These MUST be 32-bit entries */
237 /*--------------------------------------------------------------*/
238
239 SYS_FUNC fiqHandlers[IQ_NUM_INT] =
240 {
241 IQ_Dummy, /* Watchdog timer */
242 IQ_Dummy, /* timer 1 */
243 IQ_Dummy, /* timer 2 */
244 #if ((OP_L1_STANDALONE == 0) && (RF_FAM == 35))
245 TSP_RxHandler, /* 3 TSP */
246 #else
247 IQ_Dummy, /* AIRQ 3 */
248 #endif
249 IQ_Dummy, /* TPU Frame It AIRQ 4 */
250 IQ_Dummy, /* AIRQ 5 */
251 IQ_Dummy, /* AIRQ 6 */
252 IQ_Dummy, /* AIRQ 7 */
253 IQ_Dummy, /* AIRQ 8 */
254 IQ_Dummy, /* AIRQ 9 RTC Timer */
255 IQ_Dummy, /* AIRQ 10 RTC ALARM */
256 IQ_Dummy, /* AIRQ 11 ULPD GAUGING */
257 IQ_Dummy, /* AIRQ 12 */
258 IQ_Dummy, /* AIRQ 13 Spi Tx Rx interrupt */
259 IQ_Dummy, /* DMA interrupt */
260 IQ_Dummy, /* LEAD */
261 #if (OP_L1_STANDALONE == 0)
262 SIM_CD_IntHandler, /* SIM card-detect fast interrupt */
263 #else
264 IQ_Dummy, /* SIM card-detect fast interrupt */
265 #endif
266 IQ_Dummy, /* External fast interrupt */
267 IQ_Dummy, /* UART_IRDA interrupt */
268 #if (CHIPSET == 4)
269 IQ_Dummy /* ULPD GSM timer */
270 #elif ((CHIPSET == 5) || (CHIPSET == 6))
271 IQ_Dummy, /* ULPD GSM timer */
272 IQ_Dummy, /* Not mapped interrupt */
273 IQ_Dummy, /* Not mapped interrupt */
274 IQ_Dummy, /* Not mapped interrupt */
275 IQ_Dummy, /* Not mapped interrupt */
276 IQ_Dummy /* GEA interrupt */
277 #elif ((CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 10) || (CHIPSET == 11))
278 IQ_Dummy, /* ULPD GSM timer */
279 IQ_Dummy /* GEA timer */
280 #elif (CHIPSET == 9)
281 IQ_Dummy, /* ULPD GSM timer */
282 IQ_Dummy, /* Not mapped interrupt */
283 IQ_Dummy, /* Not mapped interrupt */
284 IQ_Dummy, /* Not mapped interrupt */
285 IQ_Dummy, /* Not mapped interrupt */
286 IQ_Dummy /* Reserved */
287 #endif
288 };
289 #endif
290 #endif /* (CHIPSET != 12)*/
291
292 /*--------------------------------------------------------------*/
293 /* IQ_Gauging_Handler */
294 /*--------------------------------------------------------------*/
295 /* Parameters :none */
296 /* Return : none */
297 /* Functionality : Handle unused interrupts */
298 /*--------------------------------------------------------------*/
299 void IQ_Gauging_Handler(void)
300 {
301 GAUGING_Handler();
302 #if (OP_L1_STANDALONE == 0)
303 RTC_GaugingHandler();
304 #endif
305 }
306
307
308 /*--------------------------------------------------------------*/
309 /* IQ_External */
310 /*--------------------------------------------------------------*/
311 /* Parameters : none */
312 /* Return : none */
313 /* Functionality : Handle External IRQ mapped on ABB. */
314 /*--------------------------------------------------------------*/
315 void IQ_External(void)
316 {
317 #if (CHIPSET == 12)
318 // Mask external interrupt 12
319 F_INTH_DISABLE_ONE_IT(C_INTH_ABB_IRQ_IT);
320 #else
321 // Mask external interrupt 12
322 IQ_Mask(IQ_EXT);
323 #endif
324
325 // The external IRQ is mapped on the ABB interrupt.
326 // The associated HISR ABB_Hisr is activated on reception on the external IRQ.
327 if(Activate_ABB_HISR())
328 {
329 #if (CHIPSET == 12)
330 F_INTH_ENABLE_ONE_IT(C_INTH_ABB_IRQ_IT);
331 #else
332 // Mask external interrupt 12
333 IQ_Unmask(IQ_EXT);
334 #endif
335 }
336 }
337
338 #if (CHIPSET != 12)
339 /*--------------------------------------------------------------*/
340 /* IQ_Dummy */
341 /*--------------------------------------------------------------*/
342 /* Parameters :none */
343 /* Return : none */
344 /* Functionality : Handle unused interrupts */
345 /*--------------------------------------------------------------*/
346 void IQ_Dummy(void)
347 {
348 IQ_DummyCount++;
349 }
350 #endif
351
352 /*--------------------------------------------------------------*/
353 /* IQ_RTCHandler */
354 /*--------------------------------------------------------------*/
355 /* Parameters :none */
356 /* Return : none */
357 /* Functionality : Handle RTC Time interrupts */
358 /*--------------------------------------------------------------*/
359
360 void IQ_Rtc_Handler(void)
361 {
362 #if (OP_L1_STANDALONE == 0)
363 RTC_ItTimerHandle();
364 #endif
365 }
366
367 /*--------------------------------------------------------------*/
368 /* IQ_RtcA_GsmTim_Handler */
369 /*--------------------------------------------------------------*/
370 /* Parameters :none */
371 /* Return : none */
372 /* Functionality : Handle RTC ALARM or GAUGING interrupts */
373 /*--------------------------------------------------------------*/
374
375 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11) || (CHIPSET == 12))
376 void IQ_RtcA_Handler(void)
377 {
378 #if (OP_L1_STANDALONE == 0)
379 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */
380 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM )
381 RTC_ItAlarmHandle();
382 #endif
383 }
384
385 void IQ_GsmTim_Handler(void)
386 {
387
388 if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM )
389 {
390 // it is GSM Timer it.....
391 IQ_GsmTimerCount++;
392 }
393 }
394 #else
395 void IQ_RtcA_GsmTim_Handler(void)
396 {
397 #if (OP_L1_STANDALONE == 0)
398 if ( (* (SYS_UWORD16 *) ULDP_GSM_TIMER_IT_REG) & ULPD_IT_TIMER_GSM )
399 {
400 // it is GSM Timer it.....
401 IQ_GsmTimerCount++;
402 }
403 else
404 {
405 /* INTH_DISABLEONEIT(IQ_RTC_ALARM); *//* RTC ALARM IT */
406 if ( (* (SYS_WORD8 *) RTC_STATUS_REG) & RTC_ALARM )
407 RTC_ItAlarmHandle();
408 }
409 #endif
410 }
411 #endif
412
413 #if (BOARD == 34)
414 /*
415 * IQ_IcrHandler32
416 *
417 */
418 void IQ_IcrHandler32(void)
419 {
420 CSMI_InterruptHandler();
421 }
422 #endif
423
424 /*--------------------------------------------------------------*/
425 /* IQ_TimerHandler */
426 /*--------------------------------------------------------------*/
427 /* Parameters :none */
428 /* Return : none */
429 /* Functionality : Handle Timer interrupts */
430 /*--------------------------------------------------------------*/
431 void IQ_TimerHandler(void)
432 {
433 IQ_TimerCount++;
434 TMT_Timer_Interrupt();
435 #if (defined RVM_DAR_SWE) && (defined _GSM)
436 dar_watchdog_reset();
437 #endif
438 }
439
440 /*--------------------------------------------------------------*/
441 /* IQ_FramerHandler */
442 /*--------------------------------------------------------------*/
443 /* Parameters :none */
444 /* Return : none */
445 /* Functionality : Handle Timer interrupts */
446 /*--------------------------------------------------------------*/
447 void IQ_FrameHandler(void)
448 {
449 IQ_FrameCount++;
450 TMT_Timer_Interrupt();
451 TP_FrameIntHandler();
452 #if (OP_L1_STANDALONE == 0)
453 #if (TI_PROFILER == 1)
454 // TDMA treatment for profiling buffer
455 ti_profiler_tdma_action();
456 #endif
457 #endif
458 }
459
460 /*--------------------------------------------------------------*/
461 /* IQ_TimerHandler1 */
462 /*--------------------------------------------------------------*/
463 /* Parameters :none */
464 /* Return : none */
465 /* Functionality : Handle Timer 1 interrupts */
466 /*--------------------------------------------------------------*/
467 void IQ_TimerHandler1(void)
468 {
469 IQ_TimerCount1++;
470 #if (OP_L1_STANDALONE == 1)
471 TM_Timer1Handler();
472 #endif
473 }
474
475 /*--------------------------------------------------------------*/
476 /* IQ_TimerHandler2 */
477 /*--------------------------------------------------------------*/
478 /* Parameters :none */
479 /* Return : none */
480 /* Functionality : Handle Timer 2 interrupts */
481 /*--------------------------------------------------------------*/
482 void IQ_TimerHandler2(void)
483 {
484 IQ_TimerCount2++;
485 }
486 #if(L1_DYN_DSP_DWNLD == 1)
487
488 /*-------------------------------------------------------*/
489 /* IQ_ApiHandler() */
490 /*-------------------------------------------------------*/
491 /* Parameters : none */
492 /* Return : none */
493 /* Functionality : API int management */
494 /*-------------------------------------------------------*/
495 void IQ_ApiHandler(void)
496 {
497 l1_api_handler();
498 } /* IQ_ApiHandler() */
499 #endif
500
501
502 #if (CHIPSET !=12)
503 /*--------------------------------------------------------------*/
504 /* IQ_IRQ_isr */
505 /*--------------------------------------------------------------*/
506 /* Parameters :none */
507 /* Return : none */
508 /* Functionality : HHandle IRQ interrupts */
509 /*--------------------------------------------------------------*/
510 void IQ_IRQ_isr(void)
511 {
512 irqHandlers[((* (SYS_UWORD16 *) INTH_B_IRQ_REG) & INTH_SRC_NUM)](); /* ACK IT */
513 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_IRQ); /* valid next IRQ */
514 }
515
516 /*--------------------------------------------------------------*/
517 /* IQ_FIQ_isr */
518 /*--------------------------------------------------------------*/
519 /* Parameters :none */
520 /* Return : none */
521 /* Functionality : Handle FIQ interrupts */
522 /*--------------------------------------------------------------*/
523 void IQ_FIQ_isr(void)
524 {
525 #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11))
526 fiqHandlers[((* (SYS_UWORD16 *) INTH_B_FIQ_REG) & INTH_SRC_NUM)](); /* ACK IT */
527 #endif
528 * (SYS_UWORD16 *) INTH_CTRL_REG |= (1 << INTH_FIQ); /* valid next FIQ */
529 }
530 #endif /* chipset != 12 ) */
531
532 #if ((BOARD == 8) || (BOARD == 9) || (BOARD == 40) || (BOARD == 41))
533
534 /*--------------------------------------------------------------*/
535 /* IQ_KeypadGPIOHandler */
536 /*--------------------------------------------------------------*/
537 /* Parameters : none */
538 /* Return : none */
539 /* Functionality : Handle keypad and GPIO interrupts */
540 /*--------------------------------------------------------------*/
541
542 void IQ_KeypadGPIOHandler(void)
543 {
544
545 #if (OP_L1_STANDALONE == 0)
546 /*
547 * GPIO interrupt must be checked before the keypad interrupt. The GPIO
548 * status bit is reset when the register is read.
549 */
550
551 if (AI_CheckITSource (ARMIO_GPIO_INT)) {
552 #ifdef RVM_MPM_SWE
553 // check if the SWE has been started
554 MPM_InterruptHandler ();
555 #elif BT_CLK_REQ_INT
556 BT_DRV_ClkReqInterruptHandler( );
557 #elif UARTFAX_CLASSIC_DTR_DCD
558 UAF_DTRInterruptHandler ();
559 #else
560 AI_MaskIT(ARMIO_MASKIT_GPIO);
561 AI_UnmaskIT(ARMIO_MASKIT_GPIO);
562 #endif
563 }
564 if (AI_CheckITSource (ARMIO_KEYPDAD_INT))
565 {
566 kpd_key_handler ();
567 }
568 #endif
569 }
570
571 #elif ((BOARD == 34) || (BOARD == 42) || (BOARD == 43) || (BOARD == 45))
572
573 /*--------------------------------------------------------------*/
574 /* IQ_KeypadHandler */
575 /*--------------------------------------------------------------*/
576 /* Parameters :none */
577 /* Return : none */
578 /* Functionality : Handle keypad interrupts */
579 /*--------------------------------------------------------------*/
580 void IQ_KeypadHandler(void)
581 {
582 #if (OP_L1_STANDALONE == 0)
583 #if (BOARD == 34)
584 IQ_Mask (IQ_ARMIO);
585 #else
586 kpd_key_handler ();
587 #endif
588 #endif
589 }
590
591 #endif