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comparison src/cs/services/etm/etm_tmcore.c @ 246:d25af5b7e773

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etm_tmcore.c: rm trailing white space
author Mychaela Falconia <falcon@freecalypso.org>
date Sun, 09 May 2021 20:38:06 +0000
parents 7e225a4cd537
children 12b20090b46a
comparison
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245:3eccca3ac219 246:d25af5b7e773
1 /******************************************************************************** 1 /********************************************************************************
2 * Enhanced TestMode (ETM) 2 * Enhanced TestMode (ETM)
3 * @file tmcore.c 3 * @file tmcore.c
4 * 4 *
5 * @author Kim T. Peteren (ktp@ti.com) 5 * @author Kim T. Peteren (ktp@ti.com)
6 * @version 0.1 6 * @version 0.1
7 * 7 *
8 8
38 38
39 // Version of the ETM CORE module 39 // Version of the ETM CORE module
40 // See the file etm_version.h 40 // See the file etm_version.h
41 41
42 /****************************************************************************** 42 /******************************************************************************
43 * DIE ID settings 43 * DIE ID settings
44 *****************************************************************************/ 44 *****************************************************************************/
45 45
46 #define BE_STREAM_TO_ARRAY(a, p, l) {register INT32 i; for (i = 0; i < l; i++) a[i] = *(UINT8*)(p)++;} 46 #define BE_STREAM_TO_ARRAY(a, p, l) {register INT32 i; for (i = 0; i < l; i++) a[i] = *(UINT8*)(p)++;}
47 47
48 /* DIE ID register */ 48 /* DIE ID register */
60 //Copied from rv_general.h: 60 //Copied from rv_general.h:
61 //#define BE_STREAM_TO_ARRAY(a, p, l) {register INT32 i; for (i = 0; i < l; i++) a[i] = *(UINT16*)(p)++;} 61 //#define BE_STREAM_TO_ARRAY(a, p, l) {register INT32 i; for (i = 0; i < l; i++) a[i] = *(UINT16*)(p)++;}
62 62
63 63
64 /****************************************************************************** 64 /******************************************************************************
65 * Internal prototypes 65 * Internal prototypes
66 *****************************************************************************/ 66 *****************************************************************************/
67 67
68 T_ETM_PKT *etm_core_setup(uint8 fid); 68 T_ETM_PKT *etm_core_setup(uint8 fid);
69 int etm_core(uint8 *buf, int size); 69 int etm_core(uint8 *buf, int size);
70 70
71 /****************************************************************************** 71 /******************************************************************************
72 * Register the Core Module to the ETM database 72 * Register the Core Module to the ETM database
73 *****************************************************************************/ 73 *****************************************************************************/
74 74
75 int etm_core_init(void) 75 int etm_core_init(void)
76 { 76 {
77 int result; 77 int result;
78 78
79 result = etm_register("CORE", ETM_CORE, 0, 0, etm_core); 79 result = etm_register("CORE", ETM_CORE, 0, 0, etm_core);
80 return result; 80 return result;
81 } 81 }
82 82
83 83
84 /****************************************************************************** 84 /******************************************************************************
85 * Memory read/write Functions 85 * Memory read/write Functions
113 113
114 // Put 'parameter' in return packet 114 // Put 'parameter' in return packet
115 if ((error = etm_pkt_put8(pkt, param)) < 0) { 115 if ((error = etm_pkt_put8(pkt, param)) < 0) {
116 return error; 116 return error;
117 } 117 }
118 118
119 switch (type) { 119 switch (type) {
120 case 0: // READ(0x00) 120 case 0: // READ(0x00)
121 switch (unitsize) { 121 switch (unitsize) {
122 case 1: 122 case 1:
123 mem8 = (uint8 *) addr; 123 mem8 = (uint8 *) addr;
138 while (num--) { 138 while (num--) {
139 if ((error = etm_pkt_put32(pkt, *mem32++)) < 0) 139 if ((error = etm_pkt_put32(pkt, *mem32++)) < 0)
140 break; 140 break;
141 } 141 }
142 break; 142 break;
143 } 143 }
144 break; 144 break;
145 145
146 case 16: // WRITE(0x10) 146 case 16: // WRITE(0x10)
147 switch (unitsize) { 147 switch (unitsize) {
148 case 1: 148 case 1:
149 mem8 = (uint8 *) addr; 149 mem8 = (uint8 *) addr;
150 while (num--) { 150 while (num--) {
151 *mem8++ = etm_get8(buf); 151 *mem8++ = etm_get8(buf);
153 } 153 }
154 break; 154 break;
155 case 2: 155 case 2:
156 mem16 = (uint16 *) addr; 156 mem16 = (uint16 *) addr;
157 while (num--) { 157 while (num--) {
158 *mem16++ = tmp = etm_get16(buf); 158 *mem16++ = tmp = etm_get16(buf);
159 buf += 2; 159 buf += 2;
160 } 160 }
161 break; 161 break;
162 case 4: 162 case 4:
163 mem32 = (uint32 *) addr; 163 mem32 = (uint32 *) addr;
164 while (num--) { 164 while (num--) {
165 *mem32++ = etm_get32(buf); 165 *mem32++ = etm_get32(buf);
166 buf += 4; 166 buf += 4;
167 } 167 }
168 break; 168 break;
169 } 169 }
170 break; 170 break;
171 default: 171 default:
172 return ETM_NOSYS; 172 return ETM_NOSYS;
173 } 173 }
174 174
175 if (error < 0) 175 if (error < 0)
176 return error; 176 return error;
177 177
178 return ETM_OK; 178 return ETM_OK;
179 } 179 }
180 180
181 181
182 /****************************************************************************** 182 /******************************************************************************
183 * CODEC Functions 183 * CODEC Functions
184 *****************************************************************************/ 184 *****************************************************************************/
185 185
186 // ETM sends both page value and register address in one byte. 186 // ETM sends both page value and register address in one byte.
187 // Bit field is: PPPR RRRR 187 // Bit field is: PPPR RRRR
188 // where P = page bit, R = register address bits and X = don't care bits. 188 // where P = page bit, R = register address bits and X = don't care bits.
189 189
190 int etm_codec_write(T_ETM_PKT *pkt, uint8 *buf) 190 int etm_codec_write(T_ETM_PKT *pkt, uint8 *buf)
191 { 191 {
192 extern void ABB_Write_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id, SYS_UWORD16 value); 192 extern void ABB_Write_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id, SYS_UWORD16 value);
193 uint16 page, reg, data; 193 uint16 page, reg, data;
198 return result; 198 return result;
199 199
200 page = (reg_data >> 5) & 0x3; 200 page = (reg_data >> 5) & 0x3;
201 reg = reg_data & 0x1F; 201 reg = reg_data & 0x1F;
202 data = etm_get16(buf); 202 data = etm_get16(buf);
203 203
204 tr_etm(TgTrCore, "ETM CORE: _codec_write: page(%d) reg(%d) data(0x%x)", 204 tr_etm(TgTrCore, "ETM CORE: _codec_write: page(%d) reg(%d) data(0x%x)",
205 page, reg, (data & 0x3ff)); 205 page, reg, (data & 0x3ff));
206 206
207 if (page > 7 && reg > 32) 207 if (page > 7 && reg > 32)
208 return ETM_INVAL; 208 return ETM_INVAL;
209 else { 209 else {
210 // The function below expects a 1 for page 0 and a 2 for page 1. 210 // The function below expects a 1 for page 0 and a 2 for page 1.
211 // The register address value is left-shifted by 1 since LSB is read/write command bit. 211 // The register address value is left-shifted by 1 since LSB is read/write command bit.
212 // The value is written in the 10 MSB's of register. 212 // The value is written in the 10 MSB's of register.
213 ABB_Write_Register_on_page(page + 1, reg << 1, (data & 0x3ff)); 213 ABB_Write_Register_on_page(page + 1, reg << 1, (data & 0x3ff));
214 } 214 }
215 215
216 return ETM_OK; 216 return ETM_OK;
217 } 217 }
218 218
219 219
221 { 221 {
222 extern SYS_UWORD16 ABB_Read_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id); 222 extern SYS_UWORD16 ABB_Read_Register_on_page(SYS_UWORD16 page, SYS_UWORD16 reg_id);
223 volatile uint16 value; 223 volatile uint16 value;
224 uint16 page, reg; 224 uint16 page, reg;
225 int result, reg_data; 225 int result, reg_data;
226 226
227 reg_data = *buf; 227 reg_data = *buf;
228 if ((result = etm_pkt_put8(pkt, reg_data)) < 0) 228 if ((result = etm_pkt_put8(pkt, reg_data)) < 0)
229 return result; 229 return result;
230 230
231 page = (reg_data >> 5) & 0x3; 231 page = (reg_data >> 5) & 0x3;
232 reg = reg_data & 0x1F; 232 reg = reg_data & 0x1F;
233 233
234 if (page > 7 && reg > 32) 234 if (page > 7 && reg > 32)
235 return ETM_INVAL; 235 return ETM_INVAL;
236 236
237 // The function below expects a 1 for page 0 and a 2 for page 1. 237 // The function below expects a 1 for page 0 and a 2 for page 1.
238 // The register value is left-shifted by 1 since LSB is read/write command bit. 238 // The register value is left-shifted by 1 since LSB is read/write command bit.
239 value = ABB_Read_Register_on_page(page + 1, (reg << 1)); 239 value = ABB_Read_Register_on_page(page + 1, (reg << 1));
240 240
241 tr_etm(TgTrCore, "ETM CORE: _codec_read: page(%d) reg(%d) value(0x%x)", page, reg, value); 241 tr_etm(TgTrCore, "ETM CORE: _codec_read: page(%d) reg(%d) value(0x%x)", page, reg, value);
242 242
243 result = etm_pkt_put16(pkt, value); 243 result = etm_pkt_put16(pkt, value);
244 return result; 244 return result;
245 } 245 }
246 246
247 247
264 return ETM_INVAL; 264 return ETM_INVAL;
265 265
266 data += 2; 266 data += 2;
267 num = etm_get16(data); 267 num = etm_get16(data);
268 268
269 tr_etm(TgTrCore, "ETM CORE: _echo: delay(%d) sendsize(%d) num(%d)", 269 tr_etm(TgTrCore, "ETM CORE: _echo: delay(%d) sendsize(%d) num(%d)",
270 delay, sendsize, num); 270 delay, sendsize, num);
271 271
272 if (delay > 0) { 272 if (delay > 0) {
273 rvf_delay((delay + 32) * 14 / 64); 273 rvf_delay((delay + 32) * 14 / 64);
274 } 274 }
275 275
276 for (i = 0; i < sendsize; i++) { 276 for (i = 0; i < sendsize; i++) {
277 pkt->data[i+1] = i; // data[0] = fid 277 pkt->data[i+1] = i; // data[0] = fid
278 } 278 }
279 279
280 pkt->size = sendsize; 280 pkt->size = sendsize;
281 281
282 return ETM_OK; 282 return ETM_OK;
283 } 283 }
284 284
285 285
287 { 287 {
288 // The reset code is taken form Fluid->cmd.c 288 // The reset code is taken form Fluid->cmd.c
289 int i; 289 int i;
290 290
291 tr_etm(TgTrCore, "ETM CORE: _reset: Target is Reset"); 291 tr_etm(TgTrCore, "ETM CORE: _reset: Target is Reset");
292 292
293 // Setup watchdog timer and let it timeout to make a reset 293 // Setup watchdog timer and let it timeout to make a reset
294 *(volatile uint16*) 0xfffff804 = 0xFFFF; // Timer to watchdog 294 *(volatile uint16*) 0xfffff804 = 0xFFFF; // Timer to watchdog
295 *(volatile uint16*) 0xfffff800 = 0x0080; // Start timer 295 *(volatile uint16*) 0xfffff800 = 0x0080; // Start timer
296 // Apparently works it only if we read this register? 296 // Apparently works it only if we read this register?
297 i = *(volatile uint16*) 0xfffff802; 297 i = *(volatile uint16*) 0xfffff802;
298 *(volatile uint16*) 0xfffff802 = 0x0001; // Load timer 298 *(volatile uint16*) 0xfffff802 = 0x0001; // Load timer
299 299
300 return ETM_OK; 300 return ETM_OK;
301 } 301 }
302 302
303 303
304 /****************************************************************************** 304 /******************************************************************************
309 { 309 {
310 int type, error, data; 310 int type, error, data;
311 char *p; 311 char *p;
312 extern T_KPD_KEYPAD Kp; 312 extern T_KPD_KEYPAD Kp;
313 313
314 type = *buf & 0x0F; 314 type = *buf & 0x0F;
315 buf++; 315 buf++;
316 316
317 data = etm_get32(buf); 317 data = etm_get32(buf);
318 318
319 tr_etm(TgTrCore, "ETM CORE: _debug: type(%d) data(0x%x)", type, data); 319 tr_etm(TgTrCore, "ETM CORE: _debug: type(%d) data(0x%x)", type, data);
320 320
322 switch (type) { 322 switch (type) {
323 case 0: // (0x00) Allocate Test Buffer 323 case 0: // (0x00) Allocate Test Buffer
324 if ((p = etm_malloc(data)) == NULL) 324 if ((p = etm_malloc(data)) == NULL)
325 error = ETM_NOMEM; 325 error = ETM_NOMEM;
326 else 326 else
327 error = etm_pkt_put32(pkt, (int) p); 327 error = etm_pkt_put32(pkt, (int) p);
328 break; 328 break;
329 case 1: // (0x01) Free Test Buffer. 329 case 1: // (0x01) Free Test Buffer.
330 p = (char *) data; 330 p = (char *) data;
331 etm_free(p); 331 etm_free(p);
332 break; 332 break;
333 case 2: // (0x02) Set ETM Trace mask 333 case 2: // (0x02) Set ETM Trace mask
334 tr_etm_init(data); 334 tr_etm_init(data);
335 break; 335 break;
336 case 3: // (0x03) Set read all mem banks stat 336 case 3: // (0x03) Set read all mem banks stat
337 rvf_dump_mem(); 337 rvf_dump_mem();
338 rvf_dump_pool(); 338 rvf_dump_pool();
339 rvf_dump_tasks(); 339 rvf_dump_tasks();
349 break; 349 break;
350 case 6: 350 case 6:
351 (Kp.released)(); 351 (Kp.released)();
352 break; 352 break;
353 default: 353 default:
354 error = ETM_NOSYS; 354 error = ETM_NOSYS;
355 } 355 }
356 356
357 if (error < 0) 357 if (error < 0)
358 return error; 358 return error;
359 359
375 375
376 fid = etm_get32(buf); 376 fid = etm_get32(buf);
377 377
378 tr_etm(TgTrCore, "ETM CORE: _version: fid(0x%x)", fid); 378 tr_etm(TgTrCore, "ETM CORE: _version: fid(0x%x)", fid);
379 379
380 l1s_version = (T_VERSION*) l1s_get_version(); 380 l1s_version = (T_VERSION*) l1s_get_version();
381 381
382 switch (fid) { 382 switch (fid) {
383 // Code Versions related to ETM modules 383 // Code Versions related to ETM modules
384 case SW_REV_ETM_CORE: 384 case SW_REV_ETM_CORE:
385 error = etm_pkt_put32(pkt, ETM_CORE_VERSION); 385 error = etm_pkt_put32(pkt, ETM_CORE_VERSION);
386 break; 386 break;
387 case SW_REV_ETM_AUDIO: 387 case SW_REV_ETM_AUDIO:
388 error = etm_pkt_put32(pkt, ETM_AUDIO_VERSION); 388 error = etm_pkt_put32(pkt, ETM_AUDIO_VERSION);
402 break; 402 break;
403 case SW_REV_ETM_TASK: 403 case SW_REV_ETM_TASK:
404 error = etm_pkt_put32(pkt, ETM_VERSION); 404 error = etm_pkt_put32(pkt, ETM_VERSION);
405 break; 405 break;
406 case SW_REV_ETM_API: 406 case SW_REV_ETM_API:
407 error = etm_pkt_put32(pkt, ETM_API_VERSION); 407 error = etm_pkt_put32(pkt, ETM_API_VERSION);
408 break; 408 break;
409 // Code Versions related to L1, see in l1_defty.h 409 // Code Versions related to L1, see in l1_defty.h
410 // Get the version on this way "revision = l1s.version.dsp_code_version;" 410 // Get the version on this way "revision = l1s.version.dsp_code_version;"
411 // doesn't work because of struct aligment -> compile flag -mw !!!! 411 // doesn't work because of struct aligment -> compile flag -mw !!!!
412 case SW_DSP_CODE_VERSION: 412 case SW_DSP_CODE_VERSION:
413 revision = ((T_VERSION*) l1s_version)->dsp_code_version; 413 revision = ((T_VERSION*) l1s_version)->dsp_code_version;
414 error = etm_pkt_put32(pkt, revision); 414 error = etm_pkt_put32(pkt, revision);
415 break; 415 break;
419 break; 419 break;
420 case SW_MCU_TCS_PROGRAM_RELEASE: 420 case SW_MCU_TCS_PROGRAM_RELEASE:
421 revision = ((T_VERSION*) l1s_version)->mcu_tcs_program_release; 421 revision = ((T_VERSION*) l1s_version)->mcu_tcs_program_release;
422 error = etm_pkt_put32(pkt, revision); 422 error = etm_pkt_put32(pkt, revision);
423 break; 423 break;
424 case SW_MCU_TCS_OFFICIAL: // This version allso identify version of Layer1 424 case SW_MCU_TCS_OFFICIAL: // This version allso identify version of Layer1
425 revision = ((T_VERSION*) l1s_version)->mcu_tcs_official; 425 revision = ((T_VERSION*) l1s_version)->mcu_tcs_official;
426 error = etm_pkt_put32(pkt, revision); 426 error = etm_pkt_put32(pkt, revision);
427 break; 427 break;
428 case SW_MCU_TCS_INTERNAL: 428 case SW_MCU_TCS_INTERNAL:
429 revision = ((T_VERSION*) l1s_version)->mcu_tcs_internal; 429 revision = ((T_VERSION*) l1s_version)->mcu_tcs_internal;
434 error = etm_pkt_put32(pkt, revision); 434 error = etm_pkt_put32(pkt, revision);
435 break; 435 break;
436 default: 436 default:
437 error = ETM_NOSYS; 437 error = ETM_NOSYS;
438 } 438 }
439 439
440 tr_etm(TgTrCore, "ETM CORE: _version: version(%d)", revision); 440 tr_etm(TgTrCore, "ETM CORE: _version: version(%d)", revision);
441 441
442 if (error < 0) 442 if (error < 0)
443 return error; 443 return error;
444 444
445 return ETM_OK; 445 return ETM_OK;
446 } 446 }
447 447
448 448
449 /****************************************************************************** 449 /******************************************************************************
450 * Function for reading the Die-ID from base band processor. 450 * Function for reading the Die-ID from base band processor.
451 *****************************************************************************/ 451 *****************************************************************************/
452 452
453 int etm_dieID_read(T_ETM_PKT *pkt, uint8 *inbuf) 453 int etm_dieID_read(T_ETM_PKT *pkt, uint8 *inbuf)
454 { 454 {
455 T_RV_RET result; 455 T_RV_RET result;
456 int8 byteCount; 456 int8 byteCount;
457 UINT16 dieID[DIE_ID_SIZE]; 457 UINT16 dieID[DIE_ID_SIZE];
458 int16 index; 458 int16 index;
459 volatile UINT16 *reg_p = (UINT16 *) DIE_ID_REG; 459 volatile UINT16 *reg_p = (UINT16 *) DIE_ID_REG;
460 460
461 tr_etm(TgTrCore, "ETM CORE: _dieID_read: started - Die-ID address(0x%x)", DIE_ID_REG); 461 tr_etm(TgTrCore, "ETM CORE: _dieID_read: started - Die-ID address(0x%x)", DIE_ID_REG);
462 462
463 BE_STREAM_TO_ARRAY(dieID, reg_p, DIE_ID_SIZE); 463 BE_STREAM_TO_ARRAY(dieID, reg_p, DIE_ID_SIZE);
464 464
465 for (byteCount = 0; byteCount < DIE_ID_SIZE; byteCount++) { 465 for (byteCount = 0; byteCount < DIE_ID_SIZE; byteCount++) {
466 466
467 tr_etm(TgTrCore, "ETM CORE: Die-ID[%i] Byte Read(0x%x)", byteCount, (UINT16)dieID[byteCount]); 467 tr_etm(TgTrCore, "ETM CORE: Die-ID[%i] Byte Read(0x%x)", byteCount, (UINT16)dieID[byteCount]);
468 result = etm_pkt_put16(pkt, (UINT8)(((dieID[byteCount]) & 0xFFFF))); 468 result = etm_pkt_put16(pkt, (UINT8)(((dieID[byteCount]) & 0xFFFF)));
469 if (result < 0) 469 if (result < 0)
484 // Structur of protocol data dl-link: |fid|index|data| 484 // Structur of protocol data dl-link: |fid|index|data|
485 485
486 uint8 mid; 486 uint8 mid;
487 uint8 fid; 487 uint8 fid;
488 int error = 0; 488 int error = 0;
489 T_ETM_PKT *pkt = NULL; 489 T_ETM_PKT *pkt = NULL;
490 490
491 fid = *buf++; 491 fid = *buf++;
492 492
493 tr_etm(TgTrCore, "ETM CORE: _core: fid(%c):", fid); 493 tr_etm(TgTrCore, "ETM CORE: _core: fid(%c):", fid);
494 494
495 /* Create TestMode return Packet */ 495 /* Create TestMode return Packet */
496 if ((pkt = (T_ETM_PKT *) etm_malloc(sizeof(T_ETM_PKT))) == NULL) { 496 if ((pkt = (T_ETM_PKT *) etm_malloc(sizeof(T_ETM_PKT))) == NULL) {
497 return ETM_NOMEM; 497 return ETM_NOMEM;
498 } 498 }
499 499
500 // Init. of return packet 500 // Init. of return packet
501 pkt->mid = ETM_CORE; 501 pkt->mid = ETM_CORE;
502 pkt->status = ETM_OK; 502 pkt->status = ETM_OK;
503 pkt->size = 0; 503 pkt->size = 0;
504 pkt->index = 0; 504 pkt->index = 0;
505 etm_pkt_put8(pkt, fid); 505 etm_pkt_put8(pkt, fid);
506 506
507 switch (fid) { 507 switch (fid) {
508 #ifdef RVM_ATP_SWE 508 #ifdef RVM_ATP_SWE
509 case 0x60: // old 'G' 509 case 0x60: // old 'G'
510 error = etm_at(pkt, (char *) buf); 510 error = etm_at(pkt, (char *) buf);
511 break; 511 break;
517 error = etm_echo(pkt, buf); 517 error = etm_echo(pkt, buf);
518 break; 518 break;
519 case 0x63: // old 'R' 519 case 0x63: // old 'R'
520 error = etm_reset(); 520 error = etm_reset();
521 break; 521 break;
522 case 0x64: // old 'T' 522 case 0x64: // old 'T'
523 error = etm_debug(pkt, buf); 523 error = etm_debug(pkt, buf);
524 break; 524 break;
525 case 0x65: // old 'V' 525 case 0x65: // old 'V'
526 error = etm_version(pkt, buf); 526 error = etm_version(pkt, buf);
527 break; 527 break;
528 case 0x66: // old 'C' 528 case 0x66: // old 'C'
529 error = etm_codec_read(pkt, buf); 529 error = etm_codec_read(pkt, buf);
530 break; 530 break;
531 case 0x67: // old 'D' 531 case 0x67: // old 'D'
532 error = etm_codec_write(pkt, buf); 532 error = etm_codec_write(pkt, buf);
533 break; 533 break;
534 case 0x68: // old 'd' 534 case 0x68: // old 'd'
535 error = etm_dieID_read(pkt, buf); 535 error = etm_dieID_read(pkt, buf);
536 break; 536 break;
537 default: 537 default:
538 tr_etm(TgTrCore,"ETM CORE: _core: fid ERROR"); 538 tr_etm(TgTrCore,"ETM CORE: _core: fid ERROR");
539 error = ETM_NOSYS; 539 error = ETM_NOSYS;
540 break; 540 break;
541 } 541 }
542 542
543 if (error < 0) { 543 if (error < 0) {
544 tr_etm(TgTrCore,"ETM CORE: _core: FAILED"); 544 tr_etm(TgTrCore,"ETM CORE: _core: FAILED");
545 pkt->status = -error; 545 pkt->status = -error;
546 } 546 }
547 547
548 // etm_at(): send func. is controlled by primitive 548 // etm_at(): send func. is controlled by primitive
549 if (fid == 'G' && error >= RV_OK) {} 549 if (fid == 'G' && error >= RV_OK) {}
550 else 550 else
551 etm_pkt_send(pkt); 551 etm_pkt_send(pkt);
552 552
553 etm_free(pkt); 553 etm_free(pkt);
554 return ETM_OK; 554 return ETM_OK;
555 } 555 }