--- a/src/cs/drivers/drv_app/fchg/fchg_api.c	Wed Oct 21 03:31:04 2020 +0000
+++ b/src/cs/drivers/drv_app/fchg/fchg_api.c	Thu Oct 22 22:30:49 2020 +0000
@@ -11,12 +11,44 @@
 
 T_RV_RET fchg_get_current_state(struct fchg_user_state *rstruct)
 {
+	UINT16 curr_disch_thresh;
+	INT16 ichg_temp;
+
 	if (!pwr_ctrl)
 		return RV_NOT_READY;
 	rstruct->chg_state = pwr_ctrl->state;
 	rstruct->batt_mv = pwr_ctrl->batt_mv;
+	curr_disch_thresh = pwr_ctrl->curr_disch_thresh;
 	rstruct->batt_percent =
-	    pwr_ctrl->batt_thresholds[pwr_ctrl->curr_disch_thresh].remain_capa;
+	    pwr_ctrl->batt.percent_thresh[curr_disch_thresh].remain_capa;
+	switch (rstruct->chg_state) {
+	case FCHG_STATE_CI_CHARGING:
+		ichg_temp = pwr_ctrl->ci_ichg - pwr_ctrl->i2v_offset;
+		if (ichg_temp < 0)
+			ichg_temp = 0;
+		rstruct->ichg = ichg_temp;
+		rstruct->batt_bars = FCHG_BATT_BARS_CHARGING;
+		break;
+	case FCHG_STATE_CV_CHARGING:
+		ichg_temp = pwr_ctrl->ichg_average - pwr_ctrl->i2v_offset;
+		if (ichg_temp < 0)
+			ichg_temp = 0;
+		rstruct->ichg = ichg_temp;
+		rstruct->batt_bars = FCHG_BATT_BARS_CHARGING;
+		break;
+	default:
+		rstruct->ichg = 0;
+		if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[0])
+			rstruct->batt_bars = 4;
+		else if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[1])
+			rstruct->batt_bars = 3;
+		else if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[2])
+			rstruct->batt_bars = 2;
+		else if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[3])
+			rstruct->batt_bars = 1;
+		else
+			rstruct->batt_bars = 0;
+	}
 	return RV_OK;
 }
 
@@ -58,3 +90,11 @@
 	}
 	return RV_OK;
 }
+
+T_RV_RET fchg_register_event_handler(T_FCHG_EVENT_HANDLER handler)
+{
+	if (!pwr_ctrl)
+		return RV_NOT_READY;
+	pwr_ctrl->event_handler = handler;
+	return RV_OK;
+}