FreeCalypso > hg > fc-tourmaline
view cdg-hybrid/cdginc/p_dti.h @ 51:04aaa5622fa7
disable deep sleep when Iota LEDB is on
TI's Iota chip docs say that CLK13M must be running in order for
LEDB to work, and practical experience on Mot C139 which uses
Iota LEDB for its keypad backlight concurs: if Calypso enters
deep sleep while the keypad backlight is turned on, the light
flickers visibly as the chipset goes into and out of deep sleep.
TI's original L1 sleep manager code had logic to disable deep sleep
when LT_Status() returns nonzero, but that function only works
for B-Sample and C-Sample LT, always returns 0 on BOARD 41 - no
check of Iota LEDB status anywhere. Change this code for our
current hardware: disable deep sleep when Iota LEDB has been
turned on through LLS.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Mon, 19 Oct 2020 05:11:29 +0000 |
| parents | 35f7a1dc9f7d |
| children |
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/* +--------------------------------------------------------------------------+ | PROJECT : PROTOCOL STACK | | FILE : p_dti.h | | SOURCE : "sap\dti.pdf" | | LastModified : "2000-06-29" | | IdAndVersion : "8411.110.00.007" | | SrcFileTime : "Thu Nov 29 09:40:22 2007" | | Generated by CCDGEN_2.5.5A on Fri Oct 14 21:41:52 2016 | | !!DO NOT MODIFY!!DO NOT MODIFY!!DO NOT MODIFY!! | +--------------------------------------------------------------------------+ */ /* PRAGMAS * PREFIX : NONE * COMPATIBILITY_DEFINES : NO (require PREFIX) * ALWAYS_ENUM_IN_VAL_FILE: NO * ENABLE_GROUP: NO * CAPITALIZE_TYPENAME: NO */ #ifndef P_DTI_H #define P_DTI_H #define CDG_ENTER__P_DTI_H #define CDG_ENTER__FILENAME _P_DTI_H #define CDG_ENTER__P_DTI_H__FILE_TYPE CDGINC #define CDG_ENTER__P_DTI_H__LAST_MODIFIED _2000_06_29 #define CDG_ENTER__P_DTI_H__ID_AND_VERSION _8411_110_00_007 #define CDG_ENTER__P_DTI_H__SRC_FILE_TIME _Thu_Nov_29_09_40_22_2007 #include "CDG_ENTER.h" #undef CDG_ENTER__P_DTI_H #undef CDG_ENTER__FILENAME #include "p_dti.val" /* * End of substructure section, begin of primitive definition section */ #ifndef __T_DTI_READY_IND__ #define __T_DTI_READY_IND__ /* * * CCDGEN:WriteStruct_Count==1454 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 op_ack; /*< 3: 1> operation mode */ } T_DTI_READY_IND; #endif #ifndef __T_DTI_GETDATA_REQ__ #define __T_DTI_GETDATA_REQ__ /* * * CCDGEN:WriteStruct_Count==1455 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 op_ack; /*< 3: 1> operation mode */ } T_DTI_GETDATA_REQ; #endif #ifndef __T_DTI_DATA_REQ__ #define __T_DTI_DATA_REQ__ /* * * CCDGEN:WriteStruct_Count==1456 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 p_id; /*< 3: 1> protocol identifier */ U8 op_ack; /*< 4: 1> operation mode */ U8 st_flow; /*< 5: 1> flow control state */ U8 st_line_sa; /*< 6: 1> line state sa */ U8 st_line_sb; /*< 7: 1> line state sb */ U8 st_escape; /*< 8: 1> escape state */ U8 _align0; /*< 9: 1> alignment */ U8 _align1; /*< 10: 1> alignment */ U8 _align2; /*< 11: 1> alignment */ T_desc_list desc_list; /*< 12: ? > list of generic data descriptors */ } T_DTI_DATA_REQ; #endif #ifndef __T_DTI_DATA_IND__ #define __T_DTI_DATA_IND__ /* * * CCDGEN:WriteStruct_Count==1457 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 p_id; /*< 3: 1> protocol identifier */ U8 op_ack; /*< 4: 1> operation mode */ U8 st_flow; /*< 5: 1> flow control state */ U8 st_line_sa; /*< 6: 1> line state sa */ U8 st_line_sb; /*< 7: 1> line state sb */ U8 st_escape; /*< 8: 1> escape state */ U8 _align0; /*< 9: 1> alignment */ U8 _align1; /*< 10: 1> alignment */ U8 _align2; /*< 11: 1> alignment */ T_desc_list desc_list; /*< 12: ? > list of generic data descriptors */ } T_DTI_DATA_IND; #endif #ifndef __T_DTI_DATA_TEST_REQ__ #define __T_DTI_DATA_TEST_REQ__ /* * * CCDGEN:WriteStruct_Count==1458 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 p_id; /*< 3: 1> protocol identifier */ U8 op_ack; /*< 4: 1> operation mode */ U8 st_flow; /*< 5: 1> flow control state */ U8 st_line_sa; /*< 6: 1> line state sa */ U8 st_line_sb; /*< 7: 1> line state sb */ U8 st_escape; /*< 8: 1> escape state */ U8 _align0; /*< 9: 1> alignment */ U8 _align1; /*< 10: 1> alignment */ U8 _align2; /*< 11: 1> alignment */ T_sdu sdu; /*< 12: ? > test data */ } T_DTI_DATA_TEST_REQ; #endif #ifndef __T_DTI_DATA_TEST_IND__ #define __T_DTI_DATA_TEST_IND__ /* * * CCDGEN:WriteStruct_Count==1459 */ typedef struct { U16 tui; /*< 0: 2> transmission unit identifier */ U8 c_id; /*< 2: 1> channel identifier */ U8 p_id; /*< 3: 1> protocol identifier */ U8 op_ack; /*< 4: 1> operation mode */ U8 st_flow; /*< 5: 1> flow control state */ U8 st_line_sa; /*< 6: 1> line state sa */ U8 st_line_sb; /*< 7: 1> line state sb */ U8 st_escape; /*< 8: 1> escape state */ U8 _align0; /*< 9: 1> alignment */ U8 _align1; /*< 10: 1> alignment */ U8 _align2; /*< 11: 1> alignment */ T_sdu sdu; /*< 12: ? > test data */ } T_DTI_DATA_TEST_IND; #endif #ifndef __T_DTI_DUMMY_REQ__ #define __T_DTI_DUMMY_REQ__ /* * * CCDGEN:WriteStruct_Count==1460 */ typedef struct { T_desc desc; /*< 0: ? > generic data descriptor */ } T_DTI_DUMMY_REQ; #endif #include "CDG_LEAVE.h" #endif