view src/cs/layer1/dyn_dwl_include/l1_dyn_dwl_signa.h @ 51:04aaa5622fa7

disable deep sleep when Iota LEDB is on TI's Iota chip docs say that CLK13M must be running in order for LEDB to work, and practical experience on Mot C139 which uses Iota LEDB for its keypad backlight concurs: if Calypso enters deep sleep while the keypad backlight is turned on, the light flickers visibly as the chipset goes into and out of deep sleep. TI's original L1 sleep manager code had logic to disable deep sleep when LT_Status() returns nonzero, but that function only works for B-Sample and C-Sample LT, always returns 0 on BOARD 41 - no check of Iota LEDB status anywhere. Change this code for our current hardware: disable deep sleep when Iota LEDB has been turned on through LLS.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 19 Oct 2020 05:11:29 +0000
parents 4e78acac3d88
children
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/************* Revision Controle System Header *************
 *                  GSM Layer 1 software
 * L1_DYN_DWL_SIGNA.H
 *
 *        Filename l1_dyn_dwl_signa.h
 *  Copyright 2004 (C) Texas Instruments
 *
 ************* Revision Controle System Header *************/
#if (L1_DYN_DSP_DWNLD == 1)

#ifndef _L1_DYN_DWL_SIGNA_H_
#define _L1_DYN_DWL_SIGNA_H_

#define P_DYN_DWNLD 0x41

// Messages L1S -> L1A
#define L1_DYN_DWNLD_STOP_CON              ( ( P_DYN_DWNLD << 8 ) | 0x02 )

// Messages API HISR -> L1A  //
#define API_L1_DYN_DWNLD_START_CON         ( ( P_DYN_DWNLD << 8 ) | 0x03 )
#define API_L1_DYN_DWNLD_FINISHED          ( ( P_DYN_DWNLD << 8 ) | 0x04 )
#define API_L1_DYN_DWNLD_STOP              ( ( P_DYN_DWNLD << 8 ) | 0x05 )
#define API_L1_CRC_NOT_OK                  ( ( P_DYN_DWNLD << 8 ) | 0x07 )
#define API_L1_CRC_OK                      ( ( P_DYN_DWNLD << 8 ) | 0x08 )
#define API_L1_DYN_DWNLD_UNINST_OK         ( ( P_DYN_DWNLD << 8 ) | 0x09 )

#endif  //_L1_DYN_DWL_SIGNA_H_

#endif  // L1_DYN_DSP_DWNLD