view src/cs/system/template/gsm_ds_int8_compact.template @ 51:04aaa5622fa7

disable deep sleep when Iota LEDB is on TI's Iota chip docs say that CLK13M must be running in order for LEDB to work, and practical experience on Mot C139 which uses Iota LEDB for its keypad backlight concurs: if Calypso enters deep sleep while the keypad backlight is turned on, the light flickers visibly as the chipset goes into and out of deep sleep. TI's original L1 sleep manager code had logic to disable deep sleep when LT_Status() returns nonzero, but that function only works for B-Sample and C-Sample LT, always returns 0 on BOARD 41 - no check of Iota LEDB status anywhere. Change this code for our current hardware: disable deep sleep when Iota LEDB has been turned on through LLS.
author Mychaela Falconia <falcon@freecalypso.org>
date Mon, 19 Oct 2020 05:11:29 +0000
parents 4e78acac3d88
children
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/*
 * Integrated Protocol Stack Linker command file (all components)
 *
 * Target : ARM
 *
 * Copyright (c) Texas Instruments 2002, Condat 2002
 *
 */

-c /* Autoinitialize variables at runtime */

/*********************************/
/* SPECIFY THE SYSTEM MEMORY MAP */
/*********************************/

MEMORY
{
  /* CS0: Flash 8 Mbytes ****************************************************/
  /* Interrupt Vectors Table */
  I_MEM   (RXI) : org = 0x00000000   len = 0x00000100

  /* Boot Sector */

/* COMMENT1 stuff is commented out when using the 1.22e compiler */
/* COMMENT2 stuff ditto, but when using 2.54                     */

  B_MEM   (RXI) : org = 0x00000100   len = 0x00001f00

  /* Magic Word for Calypso Boot ROM */
  MWC_MEM (RXI)  : org = 0x00002000   len = 0x00000004  fill = 0x0000001

  /* Program Memory */

  P_MEM1  (RXI) : org = 0x00004000   len = 0x00000700
  P_MEM2  (RXI) : org = 0x00004700   len = 0x00000004
  P_MEM3  (RXI) : org = 0x00004704   len = 0x00400000

  /* FFS Area */
  FFS_MEM (RX)  : org = 0x00700000   len = 0x00100000
  /**************************************************************************/

  /* CS1: External SRAM 1 Mbytes ********************************************/
  /* Data Memory */
  D_MEM1  (RW)  : org = 0x01000000   len = 0x00100000
  /**************************************************************************/

  /* CS2: External SRAM 8 Mbytes ********************************************/
  /* Data Memory */
  D_MEM2  (RW)  : org = 0x01800000   len = 0x00800000
  /**************************************************************************/

  /* CS6: Calypso Internal SRAM 512 kbytes **********************************/
  /* Code & Variables Memory */
  S_MEM   (RXW) : org = 0x00800000   len = 0x00080000
  /**************************************************************************/
}

/***********************************************/
/* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */
/***********************************************/

/*
 * Since the bootloader directly calls the INT_Initialize() routine located
 * in int.s, this int.s code must always be mapped at the same address
 * (usually in the second flash sector). Its length is about 0x500 bytes.
 * Then comes the code that need to be loaded into the internal RAM.
 */

SECTIONS
{
    .intvecs : {} > I_MEM      /* Interrupt Vectors Table */
    .monitor : > B_MEM         /* Monitor Constants & Code */
    {
        $(CONST_BOOT_LIB)
    }

    .inttext : {} > P_MEM1     /* int.s Code */

    .bss_dar : > D_MEM1        /* DAR SWE Variables */
    {
        $(BSS_DAR_LIB)
    }

    /*
     * The .bss section should not be split to ensure it is initialized to 0
     * each time the SW is reset. So the whole .bss is mapped either in D_MEM1
     * or in D_MEM2.
     */

    .bss     : > D_MEM1 | D_MEM2        /* Global & Static Variables */
    {
        $(BSS_BOOT_LIB)
    }

    /*
     * All .bss sections, which must be mapped in internal RAM must be
     * grouped in order to initialized the corresponding memory to 0.
     * This initialization is done in int.s file before calling the Nucleus
     * routine.
     */

    GROUP
    {
      S_D_Mem /* Label of start address of .bss section in Int. RAM */
      .DintMem
      {

        /*
         * .bss sections of the application
         */

        $(BSS_LIBS)

      }
 
      API_HISR_stack : {}
 
      E_D_Mem /* Label of end address of .bss section in Int. RAM */
    } > S_MEM

    /*
     * .text and .const sections which must be mapped in internal RAM.
     */

    .ldfl    : {} > P_MEM2 /* Used to know the start load address */
    GROUP load = P_MEM3, run = S_MEM
    {
      S_P_Mem  /* Label of start address of .text & .const sections in Int. RAM */
      .PIntMem
      {
        /*
         * .text and .const sections of the application.
         *
         * The .veneer sections correspond exactly to .text:v&n sections
         * implementing the veneer functions. The .text:v$n -> .veneer
         * translation is performed by PTOOL software when PTOOL_OPTIONS
         * environement variable is set to veneer_section.
         */

        $(CONST_LIBS)

      }
      E_P_Mem /* Label of end address of .text and .const sections in Int. RAM */
    }

    /*
     * The rest of the code is mapped in flash, however the trampolines
     * load address should be consistent with .text.
     */
      
    COMMENT2START
    `trampolines load = P_MEM3, run = S_MEM
    COMMENT2END

    .text    : {} > P_MEM3  /* Code */

    /*
     * The rest of the constants is mapped in flash.
     * The .cinit section should not be split.
     */

    .cinit   : {} >  P_MEM3           /* Initialization Tables */
    .const   : {} >  P_MEM3           /* Constant Data */
    KadaAPI  : {} >  P_MEM3           /* ROMized CLDC */

    .javastack: {} >> D_MEM1 | D_MEM2 /* Java stack */

    .stackandheap : > D_MEM1   /* System Stacks, etc... */
    {
      /* Leave 20 32bit words for register pushes. */
      . = align(8);
      . += 20 * 4;

      /* Stack for abort and/or undefined modes. */
      exception_stack = .;

      /* Leave 38 32bit words for state saving on exceptions. */
      _xdump_buffer = .;
      . += 38 * 4;
      . = align(8);

      /* Beginning of stacks and heap area - 2.75 kbytes (int.s) */
      stack_segment = .;
      . += 0xB00;
    }

    .data    : {} > D_MEM1     /* Initialized Data */
    .sysmem  : {} > D_MEM1     /* Dynamic Memory Allocation Area */

}