FreeCalypso > hg > fc-tourmaline
view src/cs/system/template/gsm_ds_int8_gol.template @ 51:04aaa5622fa7
disable deep sleep when Iota LEDB is on
TI's Iota chip docs say that CLK13M must be running in order for
LEDB to work, and practical experience on Mot C139 which uses
Iota LEDB for its keypad backlight concurs: if Calypso enters
deep sleep while the keypad backlight is turned on, the light
flickers visibly as the chipset goes into and out of deep sleep.
TI's original L1 sleep manager code had logic to disable deep sleep
when LT_Status() returns nonzero, but that function only works
for B-Sample and C-Sample LT, always returns 0 on BOARD 41 - no
check of Iota LEDB status anywhere. Change this code for our
current hardware: disable deep sleep when Iota LEDB has been
turned on through LLS.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Mon, 19 Oct 2020 05:11:29 +0000 |
parents | 4e78acac3d88 |
children |
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/* * Integrated Protocol Stack Linker command file (all components) * * Target : ARM * * Copyright (c) Texas Instruments 2002, Condat 2002 * */ -c /* Autoinitialize variables at runtime */ /*********************************/ /* SPECIFY THE SYSTEM MEMORY MAP */ /*********************************/ MEMORY { /* CS0: Flash 8 Mbytes ****************************************************/ /* Interrupt Vectors Table */ I_MEM (RXI) : org = 0x00000000 len = 0x00000100 /* Boot Sector */ B_MEM (RXI) : org = 0x00000100 len = 0x00001f00 /* Magic Word for Calypso Boot ROM */ MWC_MEM (RXI) : org = 0x00002000 len = 0x00000004 fill = 0x0000001 /* Program Memory */ P_MEM1 (RXI) : org = 0x00010000 len = 0x00000700 P_MEM2 (RXI) : org = 0x00010700 len = 0x003ef900 P_MEM3 (RXI) : org = 0x00400000 len = 0x00300000 /* FFS Area */ FFS_MEM (RX) : org = 0x00700000 len = 0x00100000 /**************************************************************************/ /* CS1: External SRAM 1 Mbytes ********************************************/ /* Data Memory */ D_MEM1 (RW) : org = 0x01000000 len = 0x00100000 /**************************************************************************/ /* CS2: External SRAM 8 Mbytes ********************************************/ /* Data Memory */ D_MEM2 (RW) : org = 0x01800000 len = 0x00800000 /**************************************************************************/ /* CS6: Calypso Internal SRAM 512 kbytes **********************************/ /* Code & Variables Memory */ S_MEM (RXW) : org = 0x00800000 len = 0x00040000 /**************************************************************************/ } /***********************************************/ /* SPECIFY THE SECTIONS ALLOCATION INTO MEMORY */ /***********************************************/ /* * Since the bootloader directly calls the INT_Initialize() routine located * in int.s, this int.s code must always be mapped at the same address * (usually in the second flash sector). Its length is about 0x500 bytes. * Then comes the code that need to be loaded into the internal RAM. */ SECTIONS { .intvecs : {} > I_MEM /* Interrupt Vectors Table */ .monitor : > B_MEM /* Monitor Constants & Code */ { $(CONST_BOOT_LIB) } .inttext : {} > P_MEM1 /* int.s Code */ .bss_dar : > S_MEM /* DAR SWE Variables */ { $(BSS_DAR_LIB) } .bss : > S_MEM /* Global & Static Variables */ { $(BSS_BOOT_LIB) } /* * The rest of the code and constants is mapped in flash. */ .cinit : {} > P_MEM2 /* Initialization Tables */ .const : {} > P_MEM2 /* Constant Data */ .text : {} > P_MEM2 /* Code */ .stackandheap : > S_MEM /* System Stacks, etc... */ { /* Leave 20 32bit words for register pushes. */ . = align(8); . += 20 * 4; /* Stack for abort and/or undefined modes. */ exception_stack = .; /* Leave 38 32bit words for state saving on exceptions. */ _xdump_buffer = .; . += 38 * 4; . = align(8); /* Beginning of stacks and heap area - 2.75 kbytes (int.s) */ stack_segment = .; . += 0xB00; } .data : {} > S_MEM /* Initialized Data */ .sysmem : {} > S_MEM /* Dynamic Memory Allocation Area */ }