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FCHG BSIM: init_percent logic implemented
author Mychaela Falconia <falcon@freecalypso.org>
date Wed, 12 May 2021 23:01:28 +0000
parents 94ee95dad595
children
line wrap: on
line source

ram:	ramimage.srec

link_ram.cmd:	${RAM_LINK_SCRIPT_SRC} Makefile lcfgen
	perl ../scripts/ti/make_cmd.pl lcfgen $@ 0 ${RAM_LINK_SCRIPT_SRC} \
		${SPECIAL_LINK_LIBS}

ramimage.out:	${LIBS} build_date.obj ${STR2IND_OBJ} link_ram.cmd
	../toolwrap/vlnk470 -farcall -x -o $@ -m ramimage.map $^

ramimage.m0:	ramimage.out
	../toolwrap/hex470 -m -memwidth 16 -romwidth 16 $<

ramimage.srec:	ramimage.m0
	../helpers/srec4ram $< $@