view src/cs/drivers/drv_app/fchg/fchg_api.c @ 273:5caa86ee2cfa

enable L1_NEW_AEC in l1_confg.h (bold change) The AEC function implemented in DSP ROM 3606 on the Calypso silicon we work with is the one that corresponds to L1_NEW_AEC; the same holds for DSP 34 and even for DSP 33 with more recent patch versions. However, TI shipped their TCS211 reference fw with L1_NEW_AEC set to 0, thus driving AEC the old way if anyone tried to enable it, either via AT%Nxxxx or via the audio mode facility. As a result, the fw would try to control features which no longer exist in the DSP (long vs short echo and the old echo suppression level bits), while providing no way to tune the 8 new parameter words added to the DSP's NDB page. The only sensible solution is to bite the bullet and enable L1_NEW_AEC in L1 config, with fallout propagating into RiViera Audio Service T_AUDIO_AEC_CFG structure and into /aud/*.cfg binary file format. The latter fallout will be addressed in further code changes.
author Mychaela Falconia <falcon@freecalypso.org>
date Thu, 29 Jul 2021 18:32:40 +0000
parents 769cf6273fe4
children
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/*
 * The implementation of our external API functions lives here.
 */

#include "fchg/fchg_api.h"
#include "fchg/fchg_env.h"
#include "fchg/fchg_messages.h"
#include "rv/rv_general.h"
#include "rvf/rvf_api.h"
#include "rvm/rvm_use_id_list.h"

T_RV_RET fchg_get_current_state(struct fchg_user_state *rstruct)
{
	UINT16 curr_disch_thresh;
	INT16 ichg_temp;

	if (!pwr_ctrl)
		return RV_NOT_READY;
	rstruct->chg_state = pwr_ctrl->state;
	rstruct->batt_mv = pwr_ctrl->batt_mv;
	curr_disch_thresh = pwr_ctrl->curr_disch_thresh;
	rstruct->batt_percent =
	    pwr_ctrl->batt.percent_thresh[curr_disch_thresh].remain_capa;
	switch (rstruct->chg_state) {
	case FCHG_STATE_CI_CHARGING:
		ichg_temp = pwr_ctrl->ci_ichg - pwr_ctrl->i2v_offset;
		if (ichg_temp < 0)
			ichg_temp = 0;
		rstruct->ichg = ichg_temp;
		rstruct->batt_bars = FCHG_BATT_BARS_CHARGING;
		break;
	case FCHG_STATE_CV_CHARGING:
		ichg_temp = pwr_ctrl->ichg_average - pwr_ctrl->i2v_offset;
		if (ichg_temp < 0)
			ichg_temp = 0;
		rstruct->ichg = ichg_temp;
		rstruct->batt_bars = FCHG_BATT_BARS_CHARGING;
		break;
	default:
		rstruct->ichg = 0;
		if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[0])
			rstruct->batt_bars = 4;
		else if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[1])
			rstruct->batt_bars = 3;
		else if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[2])
			rstruct->batt_bars = 2;
		else if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[3])
			rstruct->batt_bars = 1;
		else
			rstruct->batt_bars = 0;
	}
	return RV_OK;
}

T_RV_RET fchg_user_charge_control(enum fchg_user_charge_ctrl arg)
{
	enum pwr_msg_id msg_id;
	struct pwr_req_s *msg;

	if (!pwr_ctrl)
		return RV_NOT_READY;
	switch (arg) {
	case FCHG_CHARGE_START:
		if (!pwr_ctrl->config_present && !pwr_ctrl->bsim_mode)
			return RV_NOT_READY;
		msg_id = USER_START_CHARGE_REQ;
		break;
	case FCHG_CHARGE_STOP:
		msg_id = USER_STOP_CHARGE_REQ;
		break;
	default:
		return RV_INVALID_PARAMETER;
	}
	if (rvf_get_buf(pwr_ctrl->prim_id, sizeof(struct pwr_req_s),
			(T_RVF_BUFFER **)&msg) == RVF_RED) {
		rvf_send_trace(
			"rvf_get_buf() failed in fchg_user_charge_control()",
			50, NULL_PARAM, RV_TRACE_LEVEL_ERROR, FCHG_USE_ID);
		return RV_MEMORY_ERR;
	}
	msg->header.msg_id        = msg_id;
	msg->header.src_addr_id   = pwr_ctrl->addr_id;
	msg->header.dest_addr_id  = pwr_ctrl->addr_id;
	msg->header.callback_func = NULL;
	if (rvf_send_msg(pwr_ctrl->addr_id, msg) != RV_OK) {
		rvf_send_trace("fchg_user_charge_control(): Send failed!", 40,
				NULL_PARAM, RV_TRACE_LEVEL_ERROR, FCHG_USE_ID);
		rvf_free_buf(msg);
		return RV_INTERNAL_ERR;
	}
	return RV_OK;
}

T_RV_RET fchg_register_event_handler(T_FCHG_EVENT_HANDLER handler)
{
	if (!pwr_ctrl)
		return RV_NOT_READY;
	pwr_ctrl->event_handler = handler;
	return RV_OK;
}