FreeCalypso > hg > fc-tourmaline
view src/cs/drivers/drv_core/inth/inth.c @ 273:5caa86ee2cfa
enable L1_NEW_AEC in l1_confg.h (bold change)
The AEC function implemented in DSP ROM 3606 on the Calypso silicon
we work with is the one that corresponds to L1_NEW_AEC; the same holds
for DSP 34 and even for DSP 33 with more recent patch versions.
However, TI shipped their TCS211 reference fw with L1_NEW_AEC set to 0,
thus driving AEC the old way if anyone tried to enable it, either via
AT%Nxxxx or via the audio mode facility. As a result, the fw would
try to control features which no longer exist in the DSP (long vs short
echo and the old echo suppression level bits), while providing no way
to tune the 8 new parameter words added to the DSP's NDB page.
The only sensible solution is to bite the bullet and enable L1_NEW_AEC
in L1 config, with fallout propagating into RiViera Audio Service
T_AUDIO_AEC_CFG structure and into /aud/*.cfg binary file format.
The latter fallout will be addressed in further code changes.
author | Mychaela Falconia <falcon@freecalypso.org> |
---|---|
date | Thu, 29 Jul 2021 18:32:40 +0000 |
parents | 4e78acac3d88 |
children |
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/******************************************************************************* TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION Property of Texas Instruments -- For Unrestricted Internal Use Only Unauthorized reproduction and/or distribution is strictly prohibited. This product is protected under copyright law and trade secret law as an unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All rights reserved. Filename : inth.c Description : inth.c saturn interupt handler Project : drivers Author : pmonteil@tif.ti.com Patrice Monteil. Version number : 1.15 Date : 05/23/03 Previous delta : 12/19/00 14:39:21 SCCS file : /db/gsm_asp/db_ht96/dsp_0/gsw/rel_0/mcu_l1/release_gprs/RELEASE_GPRS/drivers1/common/SCCS/s.inth.c Sccs Id (SID) : '@(#) inth.c 1.8 01/30/01 10:22:26 ' *****************************************************************************/ #include "l1sw.cfg" #include "chipset.cfg" #if (CHIPSET != 12) #if (OP_L1_STANDALONE == 0) #include "main/sys_types.h" #else #include "sys_types.h" #endif #include "memif/mem.h" #include "inth.h" /*-------------------------------------------------------------- * INTH_Ack() *-------------------------------------------------------------- * Parameters : num of it * Return : none * Functionality :Acknowledge an interrupt and return the origin * of the interrupt (binary format) *--------------------------------------------------------------*/ SYS_UWORD16 INTH_Ack (int intARM) { if (intARM == INTH_IRQ) return((* (volatile SYS_UWORD16 *) INTH_B_IRQ_REG) & INTH_SRC_NUM); else return((* (volatile SYS_UWORD16 *) INTH_B_FIQ_REG) & INTH_SRC_NUM); } /*-------------------------------------------------------------- * INTH_GetPending() *-------------------------------------------------------------- * Parameters : none * Return : none * Functionality : Return the pending interrupts *--------------------------------------------------------------*/ #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) unsigned long INTH_GetPending (void) { return((unsigned long)((* (volatile SYS_UWORD16 *) INTH_IT_REG1) | ((* (volatile SYS_UWORD16 *) INTH_IT_REG2) << 16))); } #else unsigned short INTH_GetPending (void) { return(* (volatile SYS_UWORD16 *) INTH_IT_REG); } #endif /*-------------------------------------------------------------- * INTH_InitLevel() *-------------------------------------------------------------- * Parameters : num it,FIQ/IRQ,priority level,edge/level. * Return : none * Functionality : Initialize an interrupt * - put it on IRQ or FIQ * - set its priority level * *--------------------------------------------------------------*/ void INTH_InitLevel (int inputInt, int FIQ_nIRQ, int priority, int edge) { volatile SYS_UWORD16 *inthLevelReg = (SYS_UWORD16 *) INTH_EXT_REG; inthLevelReg = inthLevelReg + inputInt; #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) *inthLevelReg = (FIQ_nIRQ | (edge << 1) | (priority << 2)); #else *inthLevelReg = (FIQ_nIRQ | (priority << 1) | (edge << 5)); #endif } /*-------------------------------------------------------------- * INTH_ResetIT() *-------------------------------------------------------------- * Parameters : none * Return : none * Functionality : reset the inth it register *--------------------------------------------------------------*/ #if ((CHIPSET == 4) || (CHIPSET == 5) || (CHIPSET == 6) || (CHIPSET == 7) || (CHIPSET == 8) || (CHIPSET == 9) || (CHIPSET == 10) || (CHIPSET == 11)) unsigned long INTH_ResetIT (void) { * (volatile SYS_UWORD16 *) INTH_IT_REG1 &= 0x0000; * (volatile SYS_UWORD16 *) INTH_IT_REG2 &= 0x0000; return((unsigned long)((* (volatile SYS_UWORD16 *) INTH_IT_REG1) | ((* (volatile SYS_UWORD16 *) INTH_IT_REG2) << 16))); } #else unsigned short INTH_ResetIT (void) { * (volatile SYS_UWORD16 *) INTH_IT_REG &= 0x0000; return(* (volatile SYS_UWORD16 *) INTH_IT_REG); } #endif #endif /* endif chipset != 12 */