FreeCalypso > hg > fc-tourmaline
view scripts/cfg-template @ 223:740a8e8fc9d7
startup sync logic rework for the new PWON button boot scheme
Previously we added logic to the MMI task to hold off PEI init until
R2D is running, and then extended that condition to wait for FCHG
init too. However, the dependencies of MMI upon R2D and FCHG don't
start until mmiInit(), and that call is driven by Switch_ON() code,
hence the wait for R2D and FCHG init can be made in that code path
instead of the MMI task. Furthermore, with our new way of signaling
PWON button boot to MMI, we need a new wait to ensure that the MMI
task is up - previously this assurance was provided by the wait for
Kp pointers to be set.
Solution: revert our previous PEI init hold-off additions to MMI,
add a new flag indicating MMI task init done, and put the combined
wait for all needed conditions into our new PWON button boot code
in power.c.
| author | Mychaela Falconia <falcon@freecalypso.org> |
|---|---|
| date | Tue, 27 Apr 2021 06:24:52 +0000 |
| parents | b55b47f49638 |
| children |
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[board.cfg] BOARD 41 [chipset.cfg] ANLG_FAM 2 ANLG_PG 0 CHIPSET var [debug.cfg] TI_NUC_MONITOR 0 TI_PROFILER var [dio.cfg] DIOIL_CONFIG 0 [ffs.cfg] TARGET 1 _RVF 1 [l1sw.cfg] AMR var CUST 0 DCO_ALGO 0 IDS var L1_12NEIGH 1 L1_EOTD 0 L1_EOTD_QBIT_ACC 0 L1_GPRS var L1_GTT 0 L1_MIDI 0 L1_VOICE_MEMO_AMR var MELODY_E2 var OP_L1_STANDALONE 0 OP_RIV_AUDIO 1 ORDER2_TX_TEMP_CAL 1 RAZ_VULSWITCH_REGAUDIO 0 SECURITY 0 SPEECH_RECO var TESTMODE 1 TRACE_TYPE 4 VCXO_ALGO 1 [r2d.cfg] R2D_ASM 0 R2D_EMBEDDED_LCD var R2D_LCD_TEST 0 [rf.cfg] RF var RF_FAM var RF_PA var RF_PG var [rv.cfg] RVTOOL 0 TEST 0 _GSM 1 [swconfig.cfg] ALR 1 BT 0 DP 0 DWNLD 1 GSMLITE 0 L1_DYN_DSP_DWNLD var LONG_JUMP 3 MOVE_IN_INTERNAL_RAM 1 OP_WCP 0 PMODE var RVDATA_INTERNALRAM 0 SRVC var TR_BAUD_CONFIG var WCP_PROF 0 [sys.cfg] DSP var STD 6 [trace.cfg] LAYER_DBG 0xFFFFFFFF TRACE_LEVEL_FILTER 5