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view src/cs/layer1/include/l1_varex.h @ 223:740a8e8fc9d7

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startup sync logic rework for the new PWON button boot scheme Previously we added logic to the MMI task to hold off PEI init until R2D is running, and then extended that condition to wait for FCHG init too. However, the dependencies of MMI upon R2D and FCHG don't start until mmiInit(), and that call is driven by Switch_ON() code, hence the wait for R2D and FCHG init can be made in that code path instead of the MMI task. Furthermore, with our new way of signaling PWON button boot to MMI, we need a new wait to ensure that the MMI task is up - previously this assurance was provided by the wait for Kp pointers to be set. Solution: revert our previous PEI init hold-off additions to MMI, add a new flag indicating MMI task init done, and put the combined wait for all needed conditions into our new PWON button boot code in power.c.
author Mychaela Falconia <falcon@freecalypso.org>
date Tue, 27 Apr 2021 06:24:52 +0000
parents 4e78acac3d88
children
line wrap: on
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/************* Revision Controle System Header *************
 *                  GSM Layer 1 software 
 * L1_VAREX.H
 *
 *        Filename l1_varex.h
 *  Copyright 2003 (C) Texas Instruments  
 *
 ************* Revision Controle System Header *************/

#ifdef L1_ASYNC_C

#if (LONG_JUMP == 3)
  #ifdef __GNUC__
    #define SECTION_ATTR __attribute__ ((section (".l1s_global")))
  #else
    #define SECTION_ATTR
    #pragma DATA_SECTION(l1s,".l1s_global")
    #pragma DATA_SECTION(l1s_dsp_com,".l1s_global")
    #pragma DATA_SECTION(l1a_l1s_com,".l1s_global")
    #pragma DATA_SECTION(l1s_tpu_com,".l1s_global")
    #pragma DATA_SECTION(l1_config,".l1s_global")
  #endif
#else
  #define SECTION_ATTR
#endif

 T_L1S_GLOBAL   l1s SECTION_ATTR;
 T_L1A_GLOBAL   l1a;

 T_L1A_L1S_COM  l1a_l1s_com SECTION_ATTR;
 T_L1S_DSP_COM  l1s_dsp_com SECTION_ATTR;
 T_L1S_TPU_COM  l1s_tpu_com SECTION_ATTR;

#if (L1_DYN_DSP_DWNLD == 1)    // equivalent to an API_HISR flag
 T_L1_API_HISR       l1_apihisr;
 T_L1A_API_HISR_COM l1a_apihisr_com;
#endif

 // variables for L1 configuration
 T_L1_CONFIG    l1_config SECTION_ATTR;

 #undef SECTION_ATTR

#else  // L1_ASYNC_C

 extern T_L1S_GLOBAL   l1s;
 extern T_L1A_GLOBAL   l1a;

 extern T_L1A_L1S_COM  l1a_l1s_com;
 extern T_L1S_DSP_COM  l1s_dsp_com;
 extern T_L1S_TPU_COM  l1s_tpu_com;

 #if (L1_DYN_DSP_DWNLD == 1)    // equivalent to an API_HISR flag
 extern T_L1_API_HISR      l1_apihisr;
 extern T_L1A_API_HISR_COM l1a_apihisr_com;
#endif

 // variables for L1 configuration
 extern T_L1_CONFIG    l1_config;
#endif


extern const UWORD8 ramBootCode[]; // dummy DSP code for boot.