view src/cs/drivers/drv_app/fchg/fchg_api.c @ 275:79cfefc1e2b4

audio mode load: gracefully handle mode files of wrong AEC version Unfortunately our change of enabling L1_NEW_AEC (which is necessary in order to bring our Calypso ARM fw into match with the underlying DSP reality) brings along a change in the audio mode file binary format and file size - all those new tunable AEC parameters do need to be stored somewhere, after all. But we already have existing mode files in the old format, and setting AEC config to garbage when loading old audio modes (which is what would happen without the present change) is not an appealing proposition. The solution implemented in the present change is as follows: the audio mode loading code checks the file size, and if it differs from the active version of T_AUDIO_MODE, the T_AUDIO_AEC_CFG structure is cleared - set to the default (disabled AEC) for the compiled type of AEC. We got lucky in that this varying T_AUDIO_AEC_CFG structure sits at the end of T_AUDIO_MODE!
author Mychaela Falconia <falcon@freecalypso.org>
date Fri, 30 Jul 2021 02:55:48 +0000
parents 769cf6273fe4
children
line wrap: on
line source

/*
 * The implementation of our external API functions lives here.
 */

#include "fchg/fchg_api.h"
#include "fchg/fchg_env.h"
#include "fchg/fchg_messages.h"
#include "rv/rv_general.h"
#include "rvf/rvf_api.h"
#include "rvm/rvm_use_id_list.h"

T_RV_RET fchg_get_current_state(struct fchg_user_state *rstruct)
{
	UINT16 curr_disch_thresh;
	INT16 ichg_temp;

	if (!pwr_ctrl)
		return RV_NOT_READY;
	rstruct->chg_state = pwr_ctrl->state;
	rstruct->batt_mv = pwr_ctrl->batt_mv;
	curr_disch_thresh = pwr_ctrl->curr_disch_thresh;
	rstruct->batt_percent =
	    pwr_ctrl->batt.percent_thresh[curr_disch_thresh].remain_capa;
	switch (rstruct->chg_state) {
	case FCHG_STATE_CI_CHARGING:
		ichg_temp = pwr_ctrl->ci_ichg - pwr_ctrl->i2v_offset;
		if (ichg_temp < 0)
			ichg_temp = 0;
		rstruct->ichg = ichg_temp;
		rstruct->batt_bars = FCHG_BATT_BARS_CHARGING;
		break;
	case FCHG_STATE_CV_CHARGING:
		ichg_temp = pwr_ctrl->ichg_average - pwr_ctrl->i2v_offset;
		if (ichg_temp < 0)
			ichg_temp = 0;
		rstruct->ichg = ichg_temp;
		rstruct->batt_bars = FCHG_BATT_BARS_CHARGING;
		break;
	default:
		rstruct->ichg = 0;
		if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[0])
			rstruct->batt_bars = 4;
		else if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[1])
			rstruct->batt_bars = 3;
		else if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[2])
			rstruct->batt_bars = 2;
		else if (curr_disch_thresh <= pwr_ctrl->batt.bars_thresh[3])
			rstruct->batt_bars = 1;
		else
			rstruct->batt_bars = 0;
	}
	return RV_OK;
}

T_RV_RET fchg_user_charge_control(enum fchg_user_charge_ctrl arg)
{
	enum pwr_msg_id msg_id;
	struct pwr_req_s *msg;

	if (!pwr_ctrl)
		return RV_NOT_READY;
	switch (arg) {
	case FCHG_CHARGE_START:
		if (!pwr_ctrl->config_present && !pwr_ctrl->bsim_mode)
			return RV_NOT_READY;
		msg_id = USER_START_CHARGE_REQ;
		break;
	case FCHG_CHARGE_STOP:
		msg_id = USER_STOP_CHARGE_REQ;
		break;
	default:
		return RV_INVALID_PARAMETER;
	}
	if (rvf_get_buf(pwr_ctrl->prim_id, sizeof(struct pwr_req_s),
			(T_RVF_BUFFER **)&msg) == RVF_RED) {
		rvf_send_trace(
			"rvf_get_buf() failed in fchg_user_charge_control()",
			50, NULL_PARAM, RV_TRACE_LEVEL_ERROR, FCHG_USE_ID);
		return RV_MEMORY_ERR;
	}
	msg->header.msg_id        = msg_id;
	msg->header.src_addr_id   = pwr_ctrl->addr_id;
	msg->header.dest_addr_id  = pwr_ctrl->addr_id;
	msg->header.callback_func = NULL;
	if (rvf_send_msg(pwr_ctrl->addr_id, msg) != RV_OK) {
		rvf_send_trace("fchg_user_charge_control(): Send failed!", 40,
				NULL_PARAM, RV_TRACE_LEVEL_ERROR, FCHG_USE_ID);
		rvf_free_buf(msg);
		return RV_INTERNAL_ERR;
	}
	return RV_OK;
}

T_RV_RET fchg_register_event_handler(T_FCHG_EVENT_HANDLER handler)
{
	if (!pwr_ctrl)
		return RV_NOT_READY;
	pwr_ctrl->event_handler = handler;
	return RV_OK;
}